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PIC12CE519-04/EP Datasheet(PDF) 83 Page - Microchip Technology |
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PIC12CE519-04/EP Datasheet(HTML) 83 Page - Microchip Technology |
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83 / 113 page ![]() © 1999 Microchip Technology Inc. DS40139E-page 83 PIC12C5XX 13.4 DC CHARACTERISTICS: PIC12LC508A/509A (Commercial, Industrial) PIC12LC518/519 (Commercial, Industrial) PIC12LCR509A (Commercial, Industrial) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise specified) Operating temperature 0°C ≤ TA ≤ +70°C (commercial) –40°C ≤ TA ≤ +85°C (industrial) Operating voltage VDD range as described in DC spec Section 13.1 and Section 13.2. Param No. Characteristic Sym Min Typ† Max Units Conditions Input Low Voltage I/O ports VIL D030 with TTL buffer VSS - 0.8V V For 4.5V ≤ VDD ≤ 5.5V VSS -0.15VDD V otherwise D031 with Schmitt Trigger buffer VSS -0.2VDD V D032 MCLR, GP2/T0CKI (in EXTRC mode) VSS -0.2VDD V D033 OSC1 (in EXTRC mode) VSS -0.2VDD V Note 1 D033 OSC1 (in XT and LP) VSS -0.3VDD V Note 1 Input High Voltage I/O ports VIH - D040 with TTL buffer 0.25VDD + 0.8V -VDD V4.5V ≤ VDD ≤ 5.5V D040A 2.0V - VDD V otherwise D041 with Schmitt Trigger buffer 0.8VDD -VDD V For entire VDD range D042 MCLR, GP2/T0CKI 0.8VDD -VDD V D042A OSC1 (XT and LP) 0.7VDD -VDD V Note 1 D043 OSC1 (in EXTRC mode) 0.9VDD -VDD V D070 GPIO weak pull-up current (Note 4) IPUR 30 250 400 µAVDD = 5V, VPIN = VSS MCLR pull-up current - - - 30 µAVDD = 5V, VPIN = VSS Input Leakage Current (Notes 2, 3) D060 I/O ports IIL -- +1 µA Vss ≤ VPIN ≤ VDD, Pin at hi-imped- ance D061 T0CKI - - +5 µA Vss ≤ VPIN ≤ VDD D063 OSC1 - - +5 µA Vss ≤ VPIN ≤ VDD, XT and LP osc configuration Output Low Voltage D080 I/O ports VOL -- 0.6 V IOL = 8.5 mA, VDD = 4.5V, –40 °C to +85°C D080A - - 0.6 V IOL = 7.0 mA, VDD = 4.5V, –40 °C to +125°C Output High Voltage D090 I/O ports (Note 3) VOH VDD - 0.7 - - V IOH = -3.0 mA, VDD = 4.5V, –40 °C to +85°C D090A VDD - 0.7 - - V IOH = -2.5 mA, VDD = 4.5V, –40 °C to +125°C Capacitive Loading Specs on Output Pins D100 OSC2 pin COSC 2 - - 15 pF In XT and LP modes when exter- nal clock is used to drive OSC1. D101 All I/O pins CIO - - 50 pF † Data in “Typ” column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12C5XX be driven with external clock in RC mode. 2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as coming out of the pin. 4: This spec. applies when GP3/MCLR is configured as MCLR. The leakage current of the MCLR circuit is higher than the standard I/O logic. |
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