11-90
RF2908
Rev C1 010904
11
Pin
Function
Description
Interface Schematic
35
PLL ENABL This pin is used to power up or down the VCO and PLL. A logic high
(PLL ENABL>2.0V) powers up the VCO and PLL circuitry. A logic low
(PLL ENABL<1.0V) powers down the PLL and VCO.
36
RX ENABL
Enable pin for the receiver circuits. RX ENABL>2.0V powers up all
receiver functions. RX ENABL<1.0V turns off all receiver functions
except the PLL functions and the RF mixer.
37
BW SEL2
Bandwidth select logic input. Pin 37 and pin 38 provide a two bit control
word for the setting of the IF bandwidth. See Table1.
38
BW SEL1
Bandwidth select logic input. Pin 37 and pin 38 provide a two bit control
word for the setting of the IF bandwidth. See Table1.
39
Q DATA
Logic-level data output for the quadrature channel. This is a digital out-
put signal obtained from the output of a Schmitt trigger.
40
RSSI Q
Received signal strength indicator for the quadrature channel.
41
VREF
Gain control reference voltage.
42
IF OUT Q
Analog signal IF output for quadrature channel.
43
VGC
Gain control voltage.
44
VCC1
Power supply for bias circuits and VGA amplifiers for both the in-phase
and quadrature channels.
45
DCFB Q
DC feedback capacitor for quadrature channel.
46
GND1
Ground for VCC1 for both the in-phase and quadrature channels.
47
IN Q-
Minus input for quadrature channel
48
IN Q+
Plus input for quadrature channel
Table 1: Bandwidth Selection Controls
BWSEL1
BWSEL2
IF-3dB
Frequency
00
1MHz
01
2MHz
10
4MHz
11
8MHz
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