PLL FREQUENCY SHNTHESIZER FOR PAGER

S5T8808A

9

•

Ex 2) FRC = 1, In case of 14-bits Program, Fosc = 12.8MHz and fixed 1/4 prescaler is not used

[Osc. Freq. / Ref. Freq.] = [12.8MHz / 6.25kHz] = 2048

* The PMC bit is program Control Bit, if [1], the R-Counter will be Enabled

Serial DATA Input Timing & Phase Detector / Lock Detector Output Waveforms

Figure 3. Serial Data Input Timing

0

0

1

0

0

0

0

0

0

0

0

0

0

0

1

0

1

MSB

LSB

2

13

2

0

R - counter 14 - bits

PMC bit

FRC FnFr

50%

tsu

DATA

CLK

EN 1

tsu

50%