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S5T8808A01-R0B0 Datasheet(PDF) 10 Page - Samsung semiconductor |
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S5T8808A01-R0B0 Datasheet(HTML) 10 Page - Samsung semiconductor |
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10 / 12 page ![]() S5T8808A PLL FREQUENCY SHNTHESIZER FOR PAGE 10 The architecture of R-Count Divider Figure 4. R-CNT architecture VCO output Frequency fVCO = N x fVCO / RD fVCO = VCO output frequency fOSC = X-tal Oscillator Frequency RD = Programmable Reference R-counter value N = Programmable N-counter value Phase Detector / Lock Detector Figure 5. Phase Detector / Lock Detector Block Diagram 12.8MHz X-Tal OSCI OSCO 1 / 4 Prescaler FRC 14 bits Counter 12.8MHz 3.2MHz D0 ------------- D13 Fr 6.25KHz 1/ 4 CNT 14 Bit R - Divider Phase Detector OSCI OSCO Fin Fr Fn PDP PDA FRC 1 2 Lock Detector LD 10 7 FN 14 4 5 FR 15 4 / 5 Counter 14 Bit N - Divider 2 bits Swallow Counter 16 Bit Programmabel N_Counter |
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