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PT8300-R Datasheet(PDF) 3 Page - Princeton Technology Corp |
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PT8300-R Datasheet(HTML) 3 Page - Princeton Technology Corp |
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3 / 19 page  Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw PT8300 V1.8 - 3 - February, 2006 16-Bit I/O Expander IC PT8300 PIN CONFIGURATION PT8300 VSS /RESET CLK LATCH P15 P14 P13 P12 P11 P10 P9 P8 LATCHO CLKO VDD PULLUP DI1 DO2 P0 P1 P2 P3 P4 P5 P6 P7 DI2 DO1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 PIN DESCRIPTION Pin Name I/O Description Pin No. VSS - Ground 1 /RESET I Reset pin (Active: Low) 2 CLK I Clock input pin 3 LATCH I Latch input pin 4 P15 ~ P8 I/O Parallel data input/output pins 5 ~ 12 LATCHO O Latch output pin 13 CLKO O Clock output pin 14 DO1, DO2 O Serial data output pins 15, 25 DI1, DI2 I Serial data input pins 26, 16 P7 ~ P0 O Parallel data output pins 17 ~ 24 PULLUP I P8 to P15 control pin for internal resistor When P8 to P15 are in the output state, the PULLUP pin must be connected to VDD. When P8 to P15 are in the input state, the PULLUP pin must be connected to VSS. 27 VDD - 28 |
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