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SST49LF004B Datasheet(PDF) 21 Page - Silicon Storage Technology, Inc |
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SST49LF004B Datasheet(HTML) 21 Page - Silicon Storage Technology, Inc |
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21 / 36 page ![]() EOL Data Sheet 4 Mbit Firmware Hub SST49LF004B 21 ©2007 Silicon Storage Technology, Inc. S71307-03-EOL 12/07 DC Characteristics TABLE 11: DC OPERATING CHARACTERISTICS (ALL INTERFACES) Symbol Parameter Limits Test Conditions Min Max Units IDD1 1. IDD active while a Read or Write (Program or Erase) operation is in progress. Active VDD Current LCLK (LPC mode) and Address Input (PP mode)=VILT/VIHT at f=33 MHz (LPC mode) or 1/TRC min (PP mode) All other inputs=VIL or VIH Read 12 mA All outputs = open, VDD=VDD Max Write2 2. For PP mode: OE# = WE# = VIH; For LPC mode: f = 1/TRC min, LFRAME# = VIH. 30 mA See Note 2 ISB Standby VDD Current (LPC Interface) 100 µA LCLK (LPC mode) and Address Input (PP mode)=VILT/VIHT at f=33 MHz (LPC mode) or 1/TRC min (PP mode) LFRAME#=0.9 VDD, f=33 MHz, CE#=0.9 VDD, VDD=VDD Max, All other inputs ≥ 0.9 VDD or ≤ 0.1 VDD IRY3 3. The device is in Ready mode when no activity is on the LPC bus. Input Current for Mode and ID[3:0] pins 10 mA LCLK (LPC mode) and Address Input (PP mode)=VILT/VIHT at f=33 MHz (LPC mode) or 1/TRC min (PP mode) LFRAME#=VIL, f=33 MHz, VDD=VDD Max All other inputs ≥ 0.9 V DD or ≤ 0.1 VDD II Input Leakage Current for Mode and ID[3:0] pins 200 µA VIN=GND to VDD, VDD=VDD Max ILI Input Leakage Current 1 µA VIN=GND to VDD, VDD=VDD Max ILO Output Leakage Current 1 µA VOUT=GND to VDD, VDD=VDD Max VIHI INIT# Input High Voltage 1.1 VDD+0.5 V VDD=VDD Max VILI INIT# Input Low Voltage -0.5 0.4 V VDD=VDD Min VIL Input Low Voltage -0.5 0.3 VDD VVDD=VDD Min VIH Input High Voltage 0.5 VDD VDD+0.5 V VDD=VDD Max VOL Output Low Voltage 0.1 VDD V VOH Output High Voltage 0.9 VDD V T11.0 1307 TABLE 12: RECOMMENDED SYSTEM POWER-UP TIMINGS Symbol Parameter Minimum Units TPU-READ1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter Power-up to Read Operation 100 µs TPU-WRITE1 Power-up to Write Operation 100 µs T12.0 1307 TABLE 13: PIN CAPACITANCE (VDD=3.3V, TA=25 °C, f=1 Mhz, other pins open) Parameter Description Test Condition Maximum CI/O1 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. I/O Pin Capacitance VI/O=0V 12 pF CIN1 Input Capacitance VIN=0V 12 pF T13.0 1307 |
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