PIC18F23K22-ESLASHML datasheet(219/496 Pages) MICROCHIP

219 / 496 page

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Preliminary

DS41412C-page 219

PIC18(L)F2X/4XK22

When one device is transmitting a logical one, or letting

the line float, and a second device is transmitting a

logical zero, or holding the line low, the first device can

detect that the line is not a logical one. This detection,

when used on the SCLx line, is called clock stretching.

Clock stretching give slave devices a mechanism to

control the flow of data. When this detection is used on

the SDAx line, it is called arbitration. Arbitration

ensures that there is only one master device

communicating at any single time.

15.3.1

CLOCK STRETCHING

When a slave device has not completed processing

data, it can delay the transfer of more data through the

process of clock stretching. An addressed slave device

may hold the SCLx clock line low after receiving or

sending a bit, indicating that it is not yet ready to

continue. The master that is communicating with the

slave will attempt to raise the SCLx line in order to

transfer the next bit, but will detect that the clock line

has not yet been released. Because the SCLx

connection is open-drain, the slave has the ability to

hold that line low until it is ready to continue

communicating.

Clock stretching allows receivers that cannot keep up

with a transmitter to control the flow of incoming data.

15.3.2

ARBITRATION

Each master device must monitor the bus for Start and

Stop bits. If the device detects that the bus is busy, it

cannot begin a new message until the bus returns to an

Idle state.

However, two master devices may try to initiate a

transmission on or about the same time. When this

occurs, the process of arbitration begins. Each

transmitter checks the level of the SDAx data line and

compares it to the level that it expects to find. The first

transmitter to observe that the two levels don’t match,

loses arbitration, and must stop transmitting on the

SDAx line.

For example, if one transmitter holds the SDAx line to

a logical one (lets it float) and a second transmitter

holds it to a logical zero (pulls it low), the result is that

the SDAx line will be low. The first transmitter then

observes that the level of the line is different than

expected and concludes that another transmitter is

communicating.

The first transmitter to notice this difference is the one

that loses arbitration and must stop driving the SDAx

line. If this transmitter is also a master device, it also

must stop driving the SCLx line. It then can monitor the

lines for a Stop condition before trying to reissue its

transmission. In the meantime, the other device that

has not noticed any difference between the expected

and actual levels on the SDAx line continues with its

original transmission. It can do so without any compli-

cations, because so far, the transmission appears

exactly as expected with no other transmitter disturbing

the message.

Slave Transmit mode can also be arbitrated, when a

master addresses multiple slaves, but this is less

common.

If two master devices are sending a message to two

different slave devices at the address stage, the master

sending the lower slave address always wins

arbitration. When two master devices send messages

to the same slave address, and addresses can

sometimes refer to multiple slaves, the arbitration

process must continue into the data stage.

Arbitration usually occurs very rarely, but it is a

necessary process for proper multi-master support.

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