PIC18F23K22-ESLASHML datasheet(248/496 Pages) MICROCHIP

248 / 496 page

PIC18(L)F2X/4XK22

DS41412C-page 248

Preliminary

 2010 Microchip Technology Inc.

15.6.13

MULTI -MASTER COMMUNICATION,

BUS COLLISION AND BUS

ARBITRATION

Multi-Master mode support is achieved by bus

arbitration. When the master outputs address/data bits

onto the SDAx pin, arbitration takes place when the

master outputs a ‘1’ on SDAx, by letting SDAx float high

and another master asserts a ‘0’. When the SCLx pin

floats high, data should be stable. If the expected data

on SDAx is a ‘1’ and the data sampled on the SDAx pin

is ‘0’, then a bus collision has taken place. The master

will set the Bus Collision Interrupt Flag, BCLxIF, and

reset the I2C port to its Idle state (Figure 15-31).

If a transmit was in progress when the bus collision

occurred, the transmission is halted, the BF flag is

cleared, the SDAx and SCLx lines are deasserted and

the SSPxBUF can be written to. When the user

services the bus collision Interrupt Service Routine and

if the I2C bus is free, the user can resume

communication by asserting a Start condition.

If a Start, Repeated Start, Stop or Acknowledge

condition was in progress when the bus collision

occurred, the condition is aborted, the SDAx and SCLx

lines are deasserted and the respective control bits in

the SSPxCON2 register are cleared. When the user

services the bus collision Interrupt Service Routine and

if the I2C bus is free, the user can resume

communication by asserting a Start condition.

The master will continue to monitor the SDAx and SCLx

pins. If a Stop condition occurs, the SSPxIF bit will be set.

A write to the SSPxBUF will start the transmission of

data at the first data bit, regardless of where the

transmitter left off when the bus collision occurred.

In Multi-Master mode, the interrupt generation on the

detection of Start and Stop conditions allows the

determination of when the bus is free. Control of the I2C

bus can be taken when the P bit is set in the SSPxSTAT

cleared.

FIGURE 15-32:

BUS COLLISION TIMING FOR TRANSMIT AND ACKNOWLEDGE

SDAx

SCLx

BCLxIF

SDAx released

SDAx line pulled low

by another source

Sample SDAx. While SCLx is high,

data does not match what is driven

Bus collision has occurred.

Set bus collision

interrupt (BCLxIF)

by the master.

by master

Data changes

while SCLx = 0

PIC18F23K22-E/ML Datasheet(PDF) 248 Page - Microchip Technology

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