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PIC18F23K22-E/ML Datasheet(PDF) 341 Page - Microchip Technology |
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PIC18F23K22-E/ML Datasheet(HTML) 341 Page - Microchip Technology |
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341 / 496 page ![]() 2010 Microchip Technology Inc. Preliminary DS41412C-page 341 PIC18(L)F2X/4XK22 22.7 Operation During Sleep When the device wakes up from Sleep through an interrupt or a Watchdog Timer time-out, the contents of the VREFCON1 register are not affected. To minimize current consumption in Sleep mode, the voltage reference should be disabled. 22.8 Effects of a Reset A device Reset affects the following: • DAC is disabled • DAC output voltage is removed from the DACOUT pin •The DAC1R<4:0> range select bits are cleared REGISTER 22-1: VREFCON1: VOLTAGE REFERENCE CONTROL REGISTER 0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 U-0 R/W-0 DACEN DACLPS DACOE — DACPSS<1:0> — DACNSS bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7 DACEN: DAC Enable bit 1 = DAC is enabled 0 = DAC is disabled bit 6 DACLPS: DAC Low-Power Voltage Source Select bit 1 = DAC Positive reference source selected 0 = DAC Negative reference source selected bit 5 DACOE: DAC Voltage Output Enable bit 1 = DAC voltage level is also an output on the DACOUT pin 0 = DAC voltage level is disconnected from the DACOUT pin bit 4 Unimplemented: Read as ‘0’ bit 3-2 DACPSS<1:0>: DAC Positive Source Select bits 00 =VDD 01 =VREF+ 10 = FVR BUF1 output 11 = Reserved, do not use bit 1 Unimplemented: Read as ‘0’ bit 0 DACNSS: DAC Negative Source Select bits 1 =VREF- 0 =VSS |
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