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PIC18F23K22-E/ML Datasheet(PDF) 344 Page - Microchip Technology |
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PIC18F23K22-E/ML Datasheet(HTML) 344 Page - Microchip Technology |
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344 / 496 page ![]() PIC18(L)F2X/4XK22 DS41412C-page 344 Preliminary 2010 Microchip Technology Inc. The module is enabled by setting the HLVDEN bit (HLVDCON<4>). Each time the HLVD module is enabled, the circuitry requires some time to stabilize. The IRVST bit (HLVDCON<5>) is a read-only bit used to indicate when the circuit is stable. The module can only generate an interrupt after the circuit is stable and IRVST is set. The VDIRMAG bit (HLVDCON<7>) determines the overall operation of the module. When VDIRMAG is cleared, the module monitors for drops in VDD below a predetermined set point. When the bit is set, the module monitors for rises in VDD above the set point. 23.1 Operation When the HLVD module is enabled, a comparator uses an internally generated reference voltage as the set point. The set point is compared with the trip point, where each node in the resistor divider represents a trip point voltage. The “trip point” voltage is the voltage level at which the device detects a high or low-voltage event, depending on the configuration of the module. When the supply voltage is equal to the trip point, the voltage tapped off of the resistor array is equal to the internal reference voltage generated by the voltage reference module. The comparator then generates an interrupt signal by setting the HLVDIF bit. The trip point voltage is software programmable to any of 16 values. The trip point is selected by programming the HLVDL<3:0> bits (HLVDCON<3:0>). The HLVD module has an additional feature that allows the user to supply the trip voltage to the module from an external source. This mode is enabled when bits, HLVDL<3:0>, are set to ‘1111’. In this state, the comparator input is multiplexed from the external input pin, HLVDIN. This gives users the flexibility of configur- ing the High/Low-Voltage Detect interrupt to occur at any voltage in the valid operating range. FIGURE 23-1: HLVD MODULE BLOCK DIAGRAM (WITH EXTERNAL INPUT) Set VDD HLVDEN HLVDCON HLVDL<3:0> Register HLVDIN VDD Externally Generated Trip Point HLVDIF HLVDEN BOREN Internal Voltage Reference VDIRMAG 1.024V Typical |
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