PIC18F23K22-ESLASHML datasheet(388/496 Pages) MICROCHIP

388 / 496 page

PIC18(L)F2X/4XK22

DS41412C-page 388

Preliminary

 2010 Microchip Technology Inc.

GOTO

Unconditional Branch

Syntax:

GOTO k

Operands:

 k  1048575

Operation:

 PC<20:1>

Status Affected:

None

Encoding:

1st word (k<7:0>)

2nd word(k<19:8>)

1110

1111

k19kkk

k7kkk

kkkk

kkkk0

kkkk8

Description:

GOTO allows an unconditional branch

anywhere within entire

2-Mbyte memory range. The 20-bit

value ‘k’ is loaded into PC<20:1>.

GOTO is always a two-cycle

instruction.

Words:

Cycles:

Q Cycle Activity:

Decode

Read literal

‘k’<7:0>,

operation

Read literal

‘k’<19:8>,

Write to PC

operation

Example:

GOTO THERE

After Instruction

PC =

Address (THERE)

INCF

Increment f

Syntax:

INCF

f {,d {,a}}

Operands:

 f  255

 [0,1]

Operation:

(f) + 1

 dest

Status Affected:

C, DC, N, OV, Z

Encoding:

0010

10da

ffff

Description:

The contents of register ‘f’ are

incremented. If ‘d’ is ‘0’, the result is

placed in W. If ‘d’ is ‘1’, the result is

placed back in register ‘f’ (default).

If ‘a’ is ‘0’, the Access Bank is selected.

If ‘a’ is ‘1’, the BSR is used to select the

GPR bank.

If ‘a’ is ‘0’ and the extended instruction

set is enabled, this instruction operates

in Indexed Literal Offset Addressing

mode whenever f

95 (5Fh). See

Section 25.2.3 “Byte-Oriented and

Bit-Oriented Instructions in Indexed

Literal Offset Mode” for details.

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write to

destination

Example:

INCF

CNT, 1, 0

Before Instruction

CNT

FFh

After Instruction

CNT

00h

PIC18F23K22-E/ML Datasheet(PDF) 388 Page - Microchip Technology

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