 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
MB95430 Datasheet(PDF) 3 Page - fujitsu semiconductor |
|
|
|||||||||||||||||||||||||||||
MB95430 Datasheet(HTML) 3 Page - fujitsu semiconductor |
|
|
3 / 56 page  MB95430H Series DS07–12xxx–1E 3 ■ PRODUCT LINE-UP (Continued) Part number Parameter MB95F432H MB95F433H MB95F434H MB95F432K MB95F433K MB95F434K Type Flash memory product Clock supervisor counter It supervises the main clock oscillation. Program ROM capacity 8 Kbyte 12 Kbyte 20 Kbyte 8 Kbyte 12 Kbyte 20 Kbyte RAM capacity 240 bytes 240 bytes 496 bytes 240 bytes 240 bytes 496 bytes Low-voltage detection reset No Yes Reset input Dedicated Selected by software CPU functions Number of basic instructions : 136 Instruction bit length : 8 bits Instruction length : 1 to 3 bytes Data bit length : 1, 8 and 16 bits Minimum instruction execution time : 61.5 ns (with machine clock = 16.25 MHz) Interrupt processing time : 0.6 µs (with machine clock = 16.25 MHz) General- purpose I/O I/O ports (Max): 28 CMOS I/O: 27 N-ch open drain: 1 I/O ports (Max): 29 CMOS I/O: 27 N-ch open drain: 2 Time-base timer Interrupt cycle: 0.256 ms to 8.3 s (when external clock = 4 MHz) Hardware/ software watchdog timer Reset generation cycle - Main oscillation clock at 10 MHz: 105 ms (Min) The sub-CR clock can be used as the source clock of the hardware watchdog timer. Wild register It can be used to replace three bytes of data. 8/10-bit A/D converter 17 channels (Ch. 16 is the channel for OPAMP output.) 8-bit resolution and 10-bit resolution can be chosen. 8/16-bit composite timer 1 channel The timer can be configured as an "8-bit timer × 2 channels" or a "16-bit timer × 1 channel". It has built-in timer function, PWC function, PWM function and input capture function. Count clock: it can be selected from internal clocks (seven types) and external clocks. It can output square wave. External interrupt 8 channels Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.) It can be used to wake up the device from different standby modes. On-chip debug 1-wire serial control It supports serial writing. (asynchronous mode) UART/SIO 1 channel Data transfer with UART/SIO is enabled. It has a full duplex double buffer, variable data length (5/6/7/8 bits), a built-in baud rate generator and an error detection function. It uses the NRZ type transfer format. LSB-first data transfer and MSB-first data transfer are available to use. Clock-asynchronous (UART) serial data transfer and clock-synchronous (SIO) serial data transfer is enabled. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
