ST10F276Z5 datasheet(55/239 Pages) STMICROELECTRONICS

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ST10F276Z5

Bootstrap loader

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Figure 9.

UART bootstrap loader sequence

BSL initialization time, > 1ms @ fCPU = 40 MHz.

Zero byte (1 start bit, eight ‘0’ data bits, 1 stop bit), sent by host.

Acknowledge byte, sent by the ST10F276Z5.

32 bytes of code / data, sent by host.

Caution: TxD0 is only driven a certain time after reception of the zero byte (1.3ms @ fCPU = 40 MHz).

Internal Boot ROM / Test-Flash.

5.3.2

Entering bootstrap via UART

The device enters BSL mode if pin P0L.4 is sampled low at the end of a hardware reset. In

this case, the built-in bootstrap loader is activated independently of the selected bus mode.

The bootstrap loader code is stored in a special Test-Flash; no part of the standard mask

ROM or Flash memory area is required for this.

After entering BSL mode and the respective initialization, the device scans the RxD0 line to

receive a zero byte, that is, 1 start bit, eight ‘0’ data bits and 1 stop bit. From the duration of

this zero byte, it calculates the corresponding baud rate factor with respect to the current

CPU clock, initializes the serial interface ASC0 accordingly and switches pin TxD0 to output.

Using this baud rate, an acknowledge byte is returned to the host that provides the loaded

data.

The acknowledge byte is D5h for the ST10F276Z5.

RSTIN

TxD0

Int. Boot ROM / Test-Flash BSL-routine

32 bytes

RxD0

CSP:IP

user software

P0L.4

ST10F276Z5 Datasheet(PDF) 55 Page - STMicroelectronics