ST10F276Z5 datasheet(183/239 Pages) STMICROELECTRONICS

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ST10F276Z5

Electrical characteristics

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ISB2

Standby supply current (11)

(RTC on, 32 kHz Oscillator on,

main VDD off, VSTBY on)

VSTBY = 5.5 V

TA = 25 °C

–

250

µA

VSTBY = 5.5 V

TA = 125 °C

–

500

µA

ISB3

Standby supply current (4) (11)

(VDD transient condition)

––

2.5

This specification is not valid for outputs which are switched to open drain mode. In this case the

respective output floats and the voltage is imposed by the external circuitry.

Port 5 leakage values are granted for not selected A/D converter channel. One channels is always

selected (by default, after reset, P5.0 is selected). For the selected channel the leakage value is similar to

that of other port pins.

The leakage of P2.0 is higher than other pins due to the additional logic (pass gates active only in specific

test modes) implemented on input path. Pay attention to not stress P2.0 input pin with negative overload

beyond the specified limits: Failures in Flash reading may occur (sense amplifier perturbation). Refer to

next Figure 44 for a scheme of the input circuitry.

Not 100% tested, guaranteed by design characterization.

Overload conditions occur if the standard operating conditions are exceeded, that is, the voltage on any

pin exceeds the specified range (that is, VOV > VDD + 0.3 V or VOV < –0.3 V). The absolute sum of input

overload currents on all port pins may not exceed 50 mA. The supply voltage must remain within the

specified limits.

This specification is only valid during Reset, or during Hold- or Adapt-mode. Port 6 pins are only affected if

they are used for CS output and the open drain function is not enabled.

The maximum current may be drawn while the respective signal line remains inactive.

The minimum current must be drawn in order to drive the respective signal line active.

The power supply currents, ICC1 and ICC2, are function of the operating frequency (fCPU is expressed in

MHz). This dependency is illustrated in the Figure 45 below. These parameters are tested at VDDmax and

at maximum CPU clock frequency with all outputs disconnected and all inputs at VIL or VIH, RSTIN pin at

VIH1min: This implies I/O current is not considered. The device performs the following actions:

- Fetching code from IRAM and XRAM1 (for ICC1) or from all sectors of both IFlash and XFlash (for ICC2),

accessing in read and write to both XRAM modules

- Watchdog Timer is enabled and regularly serviced

- RTC is running with main oscillator clock as reference, generating a tick interrupts every 192 clock cycles

- Four channels of XPWM are running (waves period: 2, 2.5, 3 and 4 CPU clock cycles): No output toggling

- Five General Purpose Timers are running in timer mode with prescaler equal to 8 (T2, T3, T4, T5, T6)

- ADC is in Auto Scan Continuous Conversion mode on all 16 channels of Port5

- All interrupts generated by XPWM, RTC, Timers and ADC are not serviced

10. The Idle mode supply current is a function of the operating frequency (fCPU is expressed in MHz). This

dependency is illustrated in the Figure 44 below. These parameters are tested and at maximum CPU clock

with all outputs disconnected and all inputs at VIL or VIH, RSTIN pin at VIH1min.

11. This parameter is tested including leakage currents. All inputs (including pins configured as inputs) at 0 to

0.1 V or at VDD – 0.1 V to VDD, VAREF = 0 V, all outputs (including pins configured as outputs)

disconnected. Furthermore, the Main Voltage Regulator is assumed off: In case it is not, additional 1mA

shall be assumed.

Table 92.

DC characteristics (continued)

Symbol

Parameter

Test Condition

Limit values

Unit

Min.

Max.

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