MPC8572ECLPXATLD datasheet(50/140 Pages) FREESCALE

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MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

Ethernet Management Interface Electrical Characteristics

Ethernet Management Interface Electrical

Characteristics

The electrical characteristics specified here apply to MII management interface signals ECn_MDIO

(management data input/output) and ECn_MDC (management data clock). The electrical characteristics

for GMII, SGMII, RGMII, RMII, TBI and RTBI are specified in “Section 8, “Ethernet: Enhanced

Three-Speed Ethernet (eTSEC).”

9.1

MII Management DC Electrical Characteristics

The ECn_MDC and ECn_MDIO are defined to operate at a supply voltage of 3.3 V or 2.5 V. The DC

electrical characteristics for ECn_MDIO and ECn_MDC are provided in Table 42 and Table 43.

TSEC_1588_CLK_OUT duty cycle

tT1588CLKOTH

/tT1588CLKOUT

—

TSEC_1588_PULSE_OUT

tT1588OV

0.5

—

3.0

—

TSEC_1588_TRIG_IN pulse width

tT1588TRIGH

2*tT1588CLK_MAX

——

Note:

1.When TMR_CTRL[CKSEL] is set as ‘00’, the external TSEC_1588_CLK input is selected as the 1588 timer reference clock

source, with the timing defined in Table 41, “eTSEC IEEE 1588 AC Timing Specifications.” The maximum value of tT1588CLK

is defined in terms of TTX_CLK, that is the maximum clock cycle period of the equivalent interface speed that the eTSEC1

port is running at. When eTSEC1 is configured to operate in the parallel mode, the TTX_CLK is the maximum clock period

of the TSEC1_TX_CLK. When eTSEC1 operates in SGMII mode, the maximum value of tT1588CLK is defined in terms of

the recovered clock from SGMII SerDes. For example, for SGMII 10/100/1000 Mbps modes, the maximum value of

tT1588CLK is 3600, 360, 72 ns respectively. See the MPC8572E PowerQUICC™ III Integrated Communications Processor

Reference Manual for detailed description of TMR_CTRL registers.

2. It needs to be at least two times of the clock period of the clock selected by TMR_CTRL[CKSEL].

Table 42. MII Management DC Electrical Characteristics(LVDD/TVDD=3.3 V)

Parameter

Symbol

Min

Max

Unit

Notes

Supply voltage (3.3 V)

LVDD/TVDD

3.13

3.47

1, 2

Output high voltage

(LVDD/TVDD = Min, IOH = –1.0 mA)

VOH

2.10

OVDD + 0.3

—

Output low voltage

(LVDD/TVDD =Min, IOL = 1.0 mA)

VOL

GND

0.50

—

Input high voltage

VIH

2.0

—

Input low voltage

VIL

—0.90

—

Input high current

(LVDD/TVDD = Max, VIN

3 = 2.1 V)

IIH

—40

μA—

Table 41. eTSEC IEEE 1588 AC Timing Specifications (continued)

At recommended operating conditions with LVDD/TVDD of 3.3 V ± 5% or 2.5 V ± 5%

Parameter/Condition

Symbol

Min

Typ

Max

Unit

Note

MPC8572ECLPXATLD Datasheet(PDF) 50 Page - Freescale Semiconductor, Inc

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