FX828D2 datasheet(17/34 Pages) CMLMICRO

17 / 34 page

CTCSS/DCS/SELCALL Processor

FX828

D/828/4

TONE DECODE means that a tone has been decoded and its characteristics

are defined by the bandwidth (See SIGNALLING SET-UP Register bits 7, 6, 5

and 4) and the RX TONE number (See SELCALL and SUB-AUDIO STATUS

When Bit 6 in the SIGNALLING CONTROL Register is set to "0" the TONE

DECODE bit 4 will be set to "0".

Identification of a valid tone which is not in the pre-programmed list of up to 15

tones will cause the decoder to move to the TONE DECODE state with the RX

TONE address of "1111" in bits 3, 2, 1 and 0; indicating a valid, but

unrecognised, tone. Loss of tone, will cause the NOTONE timer to be started.

If loss of tone continues for the duration of the timeout period, then the decoder

will move to NOTONE state and the identification of pre-programmed tones will

start again. The time-out period is not user-adjustable.

RX TONE

(Bits 3, 2, 1 and 0)

These four bits hold a Hex number from $0 to $F. Numbers $0 to $E represent

the address of the tone decoded according to the tones programmed in the RX

TONE PROGRAM Register, $84.

The Hex number $F indicates the presence

of any tone that is not described by DECODER BANDWIDTH (Bits 7, 6, 5 and 4,

SIGNALLING SET-UP Register, $82) and FREQUENCY (Bits 11 - 0, RX TONE

PROGRAM Register, $84).

IRQ FLAG Register (Hex address $8F)

This register is used to indicate when the device requires attention as below:

(Bits 7 and 1)

Reserved for future use. These will be set to "0" but should be ignored by user's

software.

GPT IRQ FLAG

(Bit 6)

When the general purpose timer has reached zero in its internal register, this bit

will be set to "1" to indicate the timeout has expired. This bit is cleared to "0" by

a read of the IRQ FLAG Register (Hex address $8F).

COMP 0 to 1

IRQ FLAG

(Bit 5)

When the comparator output goes from "0" to "1" (i.e. when the input voltage is

above the DAC output voltage) this bit will be set to "1" and an interrupt

generated (if bit 5 of the IRQ MASK Register $8E is set to "1"). This bit is set to

"0" when the IRQ FLAG Register $8F is read.

COMP 1 to 0

IRQ FLAG

(Bit 4)

When the comparator output goes from "1" to "0" this bit will be set to "1" and an

interrupt generated (if bit 4 of the IRQ MASK Register $8E is set to "1"). This bit

is set to "0" when the IRQ FLAG Register $8F is read.

TONE IRQ FLAG

(Bit 3)

When RX TONE DECODE (Bit 4, SELCALL and SUB-AUDIO STATUS

changes state this bit will be set to "1". This bit is cleared to "0" by a read of the

IRQ FLAG Register (Hex address $8F).

CTCSS FAST IRQ

FLAG

(Bit 2)

When CTCSS FAST TONE (Bit 6, SELCALL and SUB-AUDIO STATUS

by a read of the IRQ FLAG Register (Hex address $8F).

DCS IRQ FLAG

(Bit 0)

When DCS DECODE/NO DECODE (Bit 7 SELCALL and SUB-AUDIO STATUS

by a read of the IRQ FLAG Register (Hex address $8F).

FX828D2 Datasheet(PDF) 17 Page - CML Microcircuits

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