K40P81M100SF2 datasheet(39/60 Pages) FREESCALE

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6.6.2 CMP and 6-bit DAC electrical specifications

Table 26. Comparator and 6-bit DAC electrical specifications

Symbol

Description

Min.

Typ.

Max.

Unit

VDD

Supply voltage

1.71

—

3.6

IDDHS

Supply current, High-speed mode (EN=1, PMODE=1,

VDDA >= VLVI_trip)

—

200

μA

IDDLS

Supply current, low-speed mode (EN=1, PMODE=0)

—

μA

IDDOFF

Supply current, OFF Mode (EN=0,)

—

100

VAIN

Analog input voltage

VSS – 0.3

—

VDD

VAIO

Analog input offset voltage

—

Analog comparator hysteresis

• HYSTCTR = 00

• HYSTCTR = 01

• HYSTCTR = 10

• HYSTCTR = 11

—

VCMPOh

Output high

VDD – 0.5

—

VCMPOl

Output low

—

0.5

tDHS

Propagation delay, high-speed mode (EN=1,

PMODE=1)

120

tDLS

Propagation delay, low-speed mode (EN=1,

PMODE=1)

120

250

420

Analog comparator initialization delay

—

TBD

IDAC6b

6-bit DAC current adder (enabled)

—

μA

INL

6-bit DAC integral non-Llnearity

–0.5

—

0.5

LSB1

DNL

6-bit DAC differential non-linearity

–0.3

—

0.3

LSB

1. 1 LSB = Vreference/64

6.6.3 12-bit DAC electrical characteristics

6.6.3.1 12-bit DAC operating requirements

Table 27. 12-bit DAC operating requirements

Symbol

Desciption

Min.

Max.

Unit

Notes

VDDA

Supply voltage

1.71

3.6

VDACR

Reference voltage

1.15

3.6

Temperature

−40

105

°C

Table continues on the next page...

Peripheral operating requirements and behaviors

K40 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.

Freescale Semiconductor, Inc.

Preliminary

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