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PC33892PNC Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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PC33892PNC Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
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4 / 28 page ![]() 33892 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 4 10 SI Serial Input This terminal is a command data input terminal connected to the SPI Serial Data Output of the MCU or to the SO terminal of the previous device of a daisy chain of devices. The input requires CMOS logic level signals and incorporates an internal active pull-down. Device control is facilitated by the input's receiving the MSB first of a serial 8-bit control command. The MCU ensures data is available upon the falling edge of SCLK. The logic state of SI present upon the rising edge of SCLK loads that bit command into the internal command shift register. This terminal has an internal active pull-down. 11 VDD Digital Drain Voltage (Power) This terminal is an external voltage input terminal used to supply power to the SPI circuit. In the event VDD is lost, an internal supply provides power to a portion of the logic, ensuring limited functionality of the device. 12 SO Serial Output This terminal is an output terminal connected to the SPI Serial Data Input terminal of the MCU or to the SI terminal of the next device of a daisy chain of devices. This output will remain tri-stated (high-impedance OFF condition) so long as the CS terminal of the device is logic HIGH. SO is only active when the CS terminal of the device is asserted logic LOW. The generated SO output signals are CMOS logic levels. SO output data is available on the falling edge of SCLK and transitions immediately on the rising edge of SCLK. 16 VPWR Positive Power Supply This terminal connects to the positive power supply and is the source of operational power for the device. The VPWR contact is the backside surface mount tab of the package. 14 21 HS3 HS2 High-Side Outputs Protected 35 m Ω high-side power output terminals to the load. 17, 18 19, 20 HS1 (Note 1) HS0 (Note 2) High-Side Outputs Protected 10 m Ω high-side power output terminals to the load. 22 FSI Fail-Safe Input The value of the resistance connected between this terminal and ground determines the state of the outputs after a Watchdog timeout occurs. Depending on the resistance value, either all outputs are OFF or the output HSO only is ON. If the FSI terminal is left to float up to a logic [1] level, then the outputs HS0 and HS2 will turn ON when in the Fail-Safe state. When the FSI terminal is connected to GND, the Watchdog circuit and Fail-Safe operation are disabled. This terminal incorporates an active internal pull- up. 23 CSNS Output Current Monitoring The Current Sense terminal sources a current proportional to the designated HS0– HS3 output. That current is fed into a ground referenced resistor and its voltage is monitored by an MCU's A/D. The channel to be monitored is selected via the SPI. This terminal can be tri-stated through SPI. Notes 1. HS1 output (17 and 18) must be connected externally on the PCB as close as possible to the terminals. 2. HS0 output (19 and 20) must be connected externally on the PCB as close as possible to the terminals. TERMINAL FUNCTION DESCRIPTION (continued) Terminal Terminal Name Formal Name Definition Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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