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PIC32MX795F512LT-80I/PF Datasheet(PDF) 205 Page - Microchip Technology |
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PIC32MX795F512LT-80I/PF Datasheet(HTML) 205 Page - Microchip Technology |
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205 / 256 page  © 2009-2011 Microchip Technology Inc. DS61156G-page 205 PIC32MX5XX/6XX/7XX FIGURE 31-12: SPIx MODULE SLAVE MODE (CKE = 0) TIMING CHARACTERISTICS SSX SCKX (CKP = 0) SCKX (CKP = 1) SDOX SP50 SP40 SP41 SP30,SP31 SP51 SP35 MSb LSb Bit 14 - - - - - -1 Bit 14 - - - -1 LSb In SP52 SP73 SP72 SP72 SP73 SP71 SP70 Note: Refer to Figure 31-1 for load conditions. SDIX MSb In TABLE 31-30: SPIx MODULE SLAVE MODE (CKE = 0) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 2.3V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤TA ≤+85°C for Industrial -40°C ≤TA ≤+105°C for V- Temp Param. No. Symbol Characteristics(1) Min. Typ.(2) Max. Units Conditions SP70 TSCL SCKx Input Low Time(3) TSCK/2 — — ns — SP71 TSCH SCKx Input High Time(3) TSCK/2 — — ns — SP72 TSCF SCKx Input Fall Time — — — ns See parameter DO32 SP73 TSCR SCKx Input Rise Time — — — ns See parameter DO31 SP30 TDOF SDOx Data Output Fall Time(4) — — — ns See parameter DO32 SP31 TDOR SDOx Data Output Rise Time(4) — — — ns See parameter DO31 SP35 TSCH2DOV, TSCL2DOV SDOx Data Output Valid after SCKx Edge — — 15 ns VDD > 2.7V — — 20 ns VDD < 2.7V SP40 TDIV2SCH, TDIV2SCL Setup Time of SDIx Data Input to SCKx Edge 10 — — ns — SP41 TSCH2DIL, TSCL2DIL Hold Time of SDIx Data Input to SCKx Edge 10 — — ns — SP50 TSSL2SCH, TSSL2SCL SSx ↓to SCKx ↑ or SCKx Input 175 — — ns — SP51 TSSH2DOZ SSx ↑ to SDOx Output High-Impedance(3) 5 — 25 ns — SP52 TSCH2SSH TSCL2SSH SSx after SCKx Edge TSCK + 20 — — ns — Note 1: These parameters are characterized, but not tested in manufacturing. 2: Data in “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only and are not tested. 3: The minimum clock period for SCKx is 40 ns. 4: Assumes 50 pF load on all SPIx pins. |
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