TMS320LC2401AVFS datasheet(42/88 Pages) TI

42 / 88 page

TMS320LF2401A, TMS320LC2401A

DSP CONTROLLERS

SPRS161K − MARCH 2001 − REVISED JULY 2007

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

enhanced analog-to-digital converter (ADC) module (continued)

The ADC module in the 2401A has been enhanced to provide flexible interface to the event manager (EVA).

The ADC interface is built around a fast, 10-bit ADC module with total conversion time of 500 ns (S/H +

conversion). The ADC module has 5 channels to service EVA. Although there are multiple input channels and

two sequencers, there is only one converter in the ADC module. Figure 15 shows the block diagram of the

2401A ADC module.

Result Registers

S/W

EVA

S/W

Sequencer 2

Sequencer 1

SOC

ADC Control Registers

70B7h

70B0h

70AFh

70A8h

Result Reg 15

Result Reg 8

Result Reg 7

Result Reg 1

Result Reg 0

(500 ns)

Module

ADC

10-Bit

Analog MUX

ADCIN00

ADCIN01

ADCIN02

ADCIN04

ADCIN03

ADCSOC

Figure 15. Block Diagram of the 2401A ADC Module

To obtain the specified accuracy of the ADC, proper board layout is very critical. To the best extent possible,

traces leading to the ADCINn pins should not run in close proximity to the digital signal paths. This is to minimize

switching noise on the digital lines from getting coupled to the ADC inputs. Furthermore, proper isolation

techniques must be used to isolate the ADC module power pins (such as VCCA and VSSA) from the digital supply.

Unused ADC inputs should be connected to analog ground for improved accuracy and ESD protection.

TMS320LC2401AVFS Datasheet(PDF) 42 Page - Texas Instruments

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