TMS320LC2401AVFS datasheet(63/88 Pages) TI

63 / 88 page

TMS320LF2401A, TMS320LC2401A

DSP CONTROLLERS

SPRS161K − MARCH 2001 − REVISED JULY 2007

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251−1443

PARAMETER MEASUREMENT INFORMATION

timing parameter symbology

Timing parameter symbols used are created in accordance with JEDEC Standard 100. To shorten the symbols,

some of the pin names and other related terminology have been abbreviated as follows:

XTAL1

CLKOUT

RESET pin RS

INT

XINT1, XINT2

Lowercase subscripts and their meanings:

Letters and symbols and their meanings:

access time

High

cycle time (period)

Low

delay time

Valid

fall time

Unknown, changing, or don’t care level

hold time

High impedance

rise time

setup time

transition time

valid time

pulse duration (width)

general notes on timing parameters

All output signals from the 2401A device (including CLKOUT) are derived from an internal clock such that all

output transitions for a given half-cycle occur with a minimum of skewing relative to each other.

The signal combinations shown in the following timing diagrams may not necessarily represent actual cycles.

For actual cycle examples, refer to the appropriate cycle description section of this data sheet.

TMS320LC2401AVFS Datasheet(PDF) 63 Page - Texas Instruments