ACT4050 datasheet(4/13 Pages) ACTIVE-SEMI

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Active-Semi

ACT4050

Rev 2, 01-Jul-11

- 4 -

www.active-semi.com

Innovative Power

FUNCTIONAL BLOCK DIAGRAM

FUNCTIONAL DESCRIPTION

As seen in Functional Block Diagram, the ACT4050

is a current mode pulse width modulation (PWM)

converter. The converter operates as follows:

A switching cycle starts when the rising edge of the

Oscillator clock output causes the High-Side Power

Switch to turn on and the Low-Side Power Switch to

turn off. With the SW side of the inductor now

connected to IN, the inductor current ramps up to

store energy in the magnetic field. The inductor

current level is measured by the Current Sense

Amplifier and added to the Oscillator ramp signal. If

the resulting summation is higher than the COMP

voltage, the output of the PWM Comparator goes

high. When this happens or when Oscillator clock

output goes low, the High-Side Power Switch turns

off and the Low-Side Power Switch turns on. At this

point, the SW side of the inductor swings to a diode

voltage below ground, causing the inductor current

to decrease and magnetic energy to be transferred

to output. This state continues until the cycle starts

again.

The High-Side Power Switch is driven by logic using

BS as the positive rail. This pin is charged to VSW + 6V

when the Low-Side Power Switch turns on.

The COMP voltage is the integration of the error

between FB input and the internal 0.817V

reference. If FB is lower than the reference voltage,

COMP tends to go higher to increase current to the

output. Current limit happens when COMP reaches

its maximum clamp value of 2.15V.

The Oscillator normally switches at 400kHz.

However, if FB voltage is less than 0.7V, then the

switching frequency decreases until it reaches a

typical value of 60kHz at VFB = 0.5V.

Shutdown Control

The ACT4050 EN pin contains a precision 1.1V

comparator with 100mV hysteresis, as well as a

2µA pull-up current source. This combination can

be used to control the on/off operation of

ACT4050 using several methods:

1) First, "always-on" operation can be enabled

simply by floating the EN pin. Any time power is

applied to VIN, the EN pull-up current source will

bring the pin above 1.1V and enable the IC. In

this case, under-voltage lockout will be controlled

by an internal 4.2V comparator on VIN.

2) Second, an open-drain or open-collector logic

device can be used to pull the EN pin low to

provide digital ON/OFF control. When the logic

pull-down is disabled, the internal 2µA pull-up

current will bring the EN pin high and enable the

chip.

3) Third, a known startup delay time can be created

by adding a small capacitor from EN to GND in

ACT4050 Datasheet(PDF) 4 Page - Active-Semi, Inc

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