RX1-

RX1+

RX2-

RX2+

TX2-

TX2+

TX1-

TX1+

GND

GND

GND

VCC

EQ2

EQ1

OS2

EN_RXD

DE1 OS1

VCC

DE2

7

1

SN65LVPE502CP

CH1

CH2

6

12

18

13

GND

24

19

NC

NC

RSVD

Thermal Pad

(must be soldered to GND plane)

Bottom View

RX1-

RX1+

RX2-

RX2+

TX2-

TX2+

TX1-

TX1+

GND

GND

GND

VCC

EQ2

EQ1

OS2

EN_RXD

DE1

OS1

VCC

DE2

24

6

SN65LVPE502CP

CH2

1

19

13

18

GND

7

12

NC

NC

RSVD

CH1

CH2

CH2

Thermal Pad

(must be soldered to GND plane)

Top View

SN65LVPE502CP

SLLSE79A

– MARCH 2011 – REVISED SEPTEMBER 2011

www.ti.com

DEVICE INFORMATION

Figure 8. Flow-Through Pin-Out

Table 1. Pin Functions

PIN

I/O Type

Description

Number

Name

HIGH SPEED DIFFERENTIAL I/O PINS

8

RX1

–

I, CML

9

RX1+

I, CML

Non-inverting and inverting CML differential input for CH 1 and CH 2. These pins are tied to an

internal voltage bias by dual termination resistor circuit

20

RX2

–

I, CML

19

RX2+

I, CML

8

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