HT37A70 datasheet(21/85 Pages) HOLTEK

21 / 85 page

HT37A70/60/50/40/30/20

Rev. 1.00

February 17, 2009

ROM Bank Pointer (2DH)

The program memory is organized into 32/24/16/12/8/4 banks for HT37A70/60/50/40/30/20 and each bank into

8192

´16 bits of program ROM. BP1.7~BP1.0 is used as the bank pointer. After an instruction has been executed to

write data to the BP1 register to select a different bank, note that the new bank will not be selected immediately. It is until

the instruction

²JMP² or ²CALL² or interrupt has completed execution that the bank will be actually selected.

Bit No.

Function

BP1 (2DH)

0~7

00000000b= Select ROM Bank0 (0000h~1FFFh)

00000001b= Select ROM Bank1 (2000h~3FFFh)

00000010b= Select ROM Bank2 (4000h~5FFFh)

00000011b= Select ROM Bank3 (6000h~7FFFh)

00011110b= Select ROM Bank30 (3C000h~3DFFFh)

00011111b= Select ROM Bank31 (3E000h~3FFFFh)

Note:

For the HT37A70/60, the ROM bank point register is 5 bits wide effectively, i.e. from b4~b0.

For the HT37A50/40, the ROM bank point register is 4 bits wide effectively, i.e. from b3~b0.

For the HT37A30, the ROM bank point register is 3 bits wide effectively, i.e. from b2~b0.

For the HT37A20, the ROM bank point register is 2 bits wide effectively, i.e. from b1~b0.

RAM Data Memory

The RAM Data Memory is a volatile area of 8-bit wide

RAM internal memory and is the location where tempo-

rary information is stored. Divided into two sections, the

first of these is an area of RAM where special function

registers are located. These registers have fixed loca-

tions and are necessary for correct operation of the de-

vice.

Many of these registers can be read from and written to

directly under program control, however, some remain

protected from user manipulation. The second area of

RAM Data Memory is reserved for general purpose use.

All locations within this area are read and write accessi-

ble under program control.

Structure

The RAM Data Memory is subdivided into 2 banks,

known as Bank 0 and Bank 1, all of which are imple-

mented in 8-bit wide RAM. Most of the RAM Data Mem-

ory is located in Bank 0 which is also subdivided into two

sections, the Special Purpose Data Memory and the

General Purpose Data Memory. The start address of the

Data Memory is the address

²00H². Registers which are

common to all microcontrollers, such as ACC, PCL, etc.,

have the same Data Memory address. Bank 1 of the

RAM Data Memory is located at address

²60H².

The RAM data memory is designed with 320

´8 bits with

2 RAM banks. There are two RAM BANK pointers

(RBP1 and RBP2 ) control Bank 0~1 (RBP1.0/RBP2.0)

The data memory is designed with 256 bytes and di-

vided into five functional groups: special function regis-

ters (00H~1FH), music synthesis controller registers

(20H~2FH), ADPCM decoder controller register

(30H~35H), the other function (35H~5FH) and general

purpose data memory (60H~FFH).

They are also indirectly accessible through Memory

pointer registers MP0, MP1and MP2, where MP1/MP2

can deal with all banks of data memory but MP0 deal

with Bank0 data memory only.

RBP1 (04H) bit0 control MP1

RBP2 (2FH) bit0 control MP2

General Purpose Data Memory

All microcontroller programs require an area of

read/write memory where temporary data can be stored

and retrieved for use later. It is this area of RAM memory

that is known as General Purpose Data Memory. This

area of Data Memory is fully accessible by the user pro-

gram for both read and write operations. The bank 0

data memory areas can handle arithmetic, logic, incre-

ment, decrement and rotate operations directly. By us-

ing the

²SET [m].i² and ²CLR [m].i² instructions

individual bits can be set or reset under program control

giving the user a large range of flexibility for bit manipu-

lation in the Data Memory.

S p e c i a l P u r p o s e

D a t a M e m o r y

0 0 H

5 F H

6 0 H

0 F F H

B a n k 0

B a n k 1

G e n e r a l P u r p o s e

D a t a M e m o r y

( 1 6 0 B y t e s )

G e n e r a l P u r p o s e

D a t a M e m o r y

( 1 6 0 B y t e s )

Bank 0~Bank 1 RAM Data Memory Structure

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