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R5F10RF8AFP Datasheet(PDF) 52 Page - Renesas Technology Corp |
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R5F10RF8AFP Datasheet(HTML) 52 Page - Renesas Technology Corp |
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52 / 76 page ![]() RL78/L12 2. ELECTRICAL SPECIFICATIONS (TARGET) Page 52 of 73 R01DS0157EJ0001 Rev.0.01 2012.02.20 Under development Preliminary document Specifications in this document are tentative and subject to change. Caution The pins mounted depend on the product. Refer to 1.3.1 32-pin products to 1.3.5 64-pin products. CSI mode serial transfer timing (slave mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.) SIp Input data Output data SOp tKCY2 tKL2 tKH2 tSIK2 tKSI2 tKSO2 SCKp CSI mode serial transfer timing (slave mode) (during communication at different potential) (When DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.) SIp Input data Output data SOp tKCY2 tKL2 tKH2 tSIK2 tKSI2 tKSO2 SCKp Caution Select the TTL input buffer for the SIp pin and SCKp pin and the N-ch open drain output (VDD tolerance) mode for the SOp pin by using port input mode register g (PIMg) and port output mode register g (POMg). Remark p: CSI number (p = 00, 01), m: Unit number (m = 0), n: Channel number (n = 0, 1), g: PIM and POM number (g = 1) |
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