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SCM6323ATS15A Datasheet(PDF) 4 Page - Motorola, Inc

Part # SCM6323ATS15A
Description  64K x 16 Bit 3.3 V Asynchronous Fast Static RAM
PDF  12 Pages
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

SCM6323ATS15A Datasheet(HTML) 4 Page - Motorola, Inc

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MCM6323A
4
MOTOROLA FAST SRAM
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V ± 0.3 V, TA = 0 to +70°C, Unless Otherwise Noted)
(TA = – 40 to + 85°C for Industrial Temperature Offering)
Logic Input Timing Measurement Reference Level
1.50 V
. . . . . . . .
Logic Input Pulse Levels
0 to 3.0 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Rise/Fall Time
2 ns
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Timing Reference Level
1.50 V
. . . . . . . . . . . . . . . . . . . . . . . . .
Output Load
See Figure 1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
READ CYCLE TIMING (See Notes 1, 2, 3, and 4)
P
Sb l
MCM6323A–10
MCM6323A–12
MCM6323A–15
Ui
N
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Read Cycle Time
tAVAV
10
—
12
—
15
—
ns
5
Address Access Time
tAVQV
—
10
—
12
—
15
ns
Enable Access Time
tELQV
—
10
—
12
—
15
ns
Output Enable Access Time
tGLQV
—
4
—
5
—
6
ns
6
Output Hold from Address Change
tAXQX
3
—
3
—
3
—
ns
Enable Low to Output Active
tELQX
3
—
3
—
3
—
ns
6, 7, 8
Output Enable Low to Output Active
tGLQX
0
—
0
—
0
—
ns
6, 7, 8
Enable High to Output High–Z
tEHQZ
—
4
—
5
—
6
ns
6, 7, 8
Output Enable High to Output High–Z
tGHQZ
—
4
—
5
—
6
ns
6, 7, 8
Byte Enable Access Time
tBLQV
—
4
—
5
—
6
ns
Byte Enable Low to Output Active
tBLQX
0
—
0
—
0
—
ns
6, 7, 8
Byte High to Output High–Z
tBHQZ
0
5
0
5
0
5
ns
6, 7, 8
NOTES:
1. W is high for read cycle.
2. For common I/O applications, minimization, or elimination of bus contention conditions is necessary during read and write cycles.
3. Device is continuously selected (E = VIL, G = VIL, and LB and/or UB = VIL).
4. Addresses valid prior to or coincident with E going low.
5. All read cycle timings are referenced from the last valid address to the first transitioning address.
6. Transition is measured 200 mV from steady–state voltage.
7. At any given voltage and temperature, tEHQZ (max) < tELQX (min), and tGHQZ (max) < tGLQX (min), both for a given device and from
device to device.
8. This parameter is sampled and not 100% tested.



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