FXOS8700CQ datasheet(18/86 Pages) FREESCALE

18 / 86 page

Sensors

Freescale Semiconductor, Inc.

Modes of Operation

Figure 9. FXOS8700CQ power mode transition diagram

All register contents are preserved when transitioning from Active to Standby mode. Some registers are reset when transitioning

from Standby to Active. These are all noted in the device memory map register table. The Sleep and Wake modes are active

modes. For more information on how to use the Sleep and Wake modes and configuring the device to transition between them,

please refer to Section 7, “Embedded Functionality” or Freescale application note AN4074.

Table 13. Mode of operation description

Mode

I2C/SPI Bus state

VDD

VDDIO

Function description

OFF

Powered down

<1.8 V VDDIO can be > VDD

The device is powered off. All analog and digital blocks

are shutdown. I2C bus inhibited.

Standby

I2C/SPI communication with

FXOS8700CQ is possible

VDDIO = High

VDD = High

Active bit is cleared

Only digital blocks are enabled.

Analog subsystem is disabled. Internal clocks disabled.

Active

(Wake/Sleep)

I2C/SPI communication with

FXOS8700CQ is possible

VDDIO = High

VDD = High

Active bit is set

All blocks are enabled (digital and analog).

Sleep

Wake

Standby

OFF

Active

FXOS8700CQ Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc