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THS6204IPWPR Datasheet(PDF) 25 Page - Texas Instruments |
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THS6204IPWPR Datasheet(HTML) 25 Page - Texas Instruments |
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25 / 43 page ![]() DUAL-SUPPLY VDSL DOWNSTREAM R = M Z LINE 2n 2 (3) LINE DRIVER HEADROOM MODEL P =10 log ´ L (1mW) R ´ L V RMS 2 (4) V = RMS 10 P L (1mW) R 10 ´ ´ L (5) V =CrestFactor V =CF V P RMS RMS ´ ´ (6) V =2 CF V LP RMS P ´ ´ (7) R 1.33kW G 2kW 2kW 0.1 F m 0.1 F m R 9.1W S R 100W L Z LINE AFE 2V Max Assumed PP R 2kW F 20W 20W R 2kW F 1/4 THS6204 1/4 THS6204 +12V -12V 1:1.1 I =159mA P I =159mA P R 9.1W S R 2.7kW P R 2.7kW P V =2 CF LPP ´ ´ 10 P L (1mW) R 10 ´ ´ L (8) G =1+ D 2 R ´ F R G (2) ±I = P 4R M 1 ´ 2 1 n 2 V ´ LPP ´ (9) THS6204 www.ti.com ................................................................................................................................................... SBOS416C – OCTOBER 2007 – REVISED APRIL 2009 the phone line, and also provide a means of detecting the received signal for the receiver. The value of Figure 82 shows an example of a dual-supply VDSL these resistors (RM) is a function of the line downstream driver. Both channels of the THS6204 impedance and the transformer turns ratio (n), given are configured as a differential gain stage to provide by the following equation: signal drive to the primary winding of the transformer (here, a step-up transformer with a turns ratio of 1:1.1). The main advantage of this configuration is the cancellation of all even harmonic distortion products. Another important advantage for VDSL is that each amplifier needs only to swing half of the total output required driving the load. The first step in a transformer-coupled, twisted-pair driver design is to compute the peak-to-peak output voltage from the target specifications. This is done using the following equations: with PL power at the load, VRMS voltage at the load, and RL load impedance; this gives the following: with VP peak voltage at the load and CF Crest Factor. with VLPP: peak-to-peak voltage at the load. Consolidating Equation 4 through Equation 7 allows expressing the required peak-to-peak voltage at the load as a function of the crest factor, the load Figure 82. Dual-Supply VDSL Downstream Driver impedance, and the power at the load. Thus, The analog front end (AFE) signal is ac-coupled to the driver, and the noninverting input of each amplifier is biased to the mid-supply voltage (ground in this case). In addition to providing the proper This VLPP is usually computed for a nominal line biasing to the amplifier, this approach also provides a impedance and may be taken as a fixed design high-pass filtering with a corner frequency, set here at target. 5kHz. As the signal bandwidth starts at 26kHz, this The next step in the design is to compute the high-pass filter does not generate any problem and individual amplifier output voltage and currents as a has the advantage of filtering out unwanted lower function of VPP on the line and transformer turns ratio. frequencies. As this turns ratio changes, the minimum allowed The input signal is amplified with a gain set by the supply voltage changes along with it. The peak following equation: current in the amplifier output is given by: With RF = 2kΩ and RG = 1.33kΩ, the gain for this differential amplifier is RP = 2.1kΩ. This gain boosts the AFE signal, assumed to be a maximum of 2VPP, to a maximum of 3VPP. The two back-termination resistors (9.1 Ω each) added at each terminal of the transformer make the impedance of the modem match the impedance of Copyright © 2007–2009, Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Link(s): THS6204 |
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