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SST30VR021 Datasheet(PDF) 5 Page - Silicon Storage Technology, Inc |
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SST30VR021 Datasheet(HTML) 5 Page - Silicon Storage Technology, Inc |
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5 / 12 page ![]() Data Sheet 2 Mbit ROM + 1 Mbit / 2Mbit / 256 Kbit SRAM ROM/RAM Combo SST30VR021 / SST30VR022 / SST30VR023 5 ©2001 Silicon Storage Technology, Inc. S71135-02-000 4/01 380 AC CHARACTERISTICS I. ROM Operation FIGURE 4: ROM READ CYCLE TIMING DIAGRAM (ADDRESS CONTROLLED) (ROMCS# = OE# = VIL) TABLE 5: READ CYCLE TIMING PARAMETERS VDD = 3.0V±0.3 Symbol Parameter SST30VR022-70 SST30VR021/023-500 Units Min Max Min Max TRC Read Cycle Time 70 500 ns TAA Address Access Time 70 500 ns TCO Chip Select to Output 70 500 ns TOE Output Enable to Valid Output 35 250 ns TLZ Chip Select to Low-Z Output 0 25 ns TOLZ Output Enable to Low-Z Output 0 25 ns THZ Chip Disable to High-Z Output 25 30 ns TOHZ Output Disable to High-Z Output 25 30 ns TOH Output Hold from Address Change 10 15 ns T5.1 380 TRC TAA Data Valid 380 ILL F02.0 Data Out Previous Data Valid Address TOH |
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