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KMB-001LEVALZ Datasheet(PDF) 16 Page - Intersil Corporation

Part # KMB-001LEVALZ
Description  High Performance Dual 14-Bit, 125MSPS ADC
PDF  32 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

KMB-001LEVALZ Datasheet(HTML) 16 Page - Intersil Corporation

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ISLA224P12
16
FN7983.3
August 17, 2012
User Initiated Reset
Recalibration of the A/D can be initiated at any time by driving
the RESETN pin low for a minimum of one clock cycle. An
open-drain driver with a drive strength in its high impedance
state of less than 0.5mA is recommended, as RESETN has an
internal high impedance pull-up to OVDD. As is the case during
power-on reset, RESETN and DNC pins must be in the proper
state for the calibration to successfully execute.
The performance of the ISLA224P12 changes with variations in
temperature, supply voltage or sample rate. The extent of these
changes may necessitate recalibration, depending on system
performance requirements. Best performance will be achieved
by recalibrating the A/D under the environmental conditions at
which it will operate.
A supply voltage variation of <100mV will generally result in an
SNR change of <0.5dBFS and SFDR change of <3dBc.
In situations where the sample rate is not constant, best results
will be obtained if the device is calibrated at the highest sample
rate. Reducing the sample rate by less than 80MSPS will typically
result in an SNR change of <0.5dBFS and an SFDR change of
<3dBc.
Figures 23 through 28 show the effect of temperature on SNR
and SFDR performance with power on calibration performed at
-40°C, +25°C, and +85°C. Each plot shows the variation of
SNR/SFDR across temperature after a single power on
calibration at -40°C, +25°C and +85°C. Best performance is
typically achieved by a user-initiated power on calibration at the
operating conditions, as stated earlier. However, it can be seen
that performance drift with temperature is not a very strong
function of the temperature at which the power on calibration is
performed.
FIGURE 22. CALIBRATION TIMING
CLKP
CLKN
CLKOUTP
CALIBRATION
BEGINS
CALIBRATION
COMPLETE
CALIBRATION
TIME
RESETN
CAL_STATUS
BIT
Temperature Calibration
FIGURE 23. TYPICAL SNR PERFORMANCE vs TEMPERATURE,
DEVICE CALIBRATED AT -40°C, fIN = 105MHz
FIGURE 24. TYPICAL SFDR PERFORMANCE vs TEMPERATURE,
DEVICE CALIBRATED AT -40°C, fIN = 105MHz
FIGURE 25. TYPICAL SNR PERFORMANCE vs TEMPERATURE,
DEVICE CALIBRATED AT +25°C, fIN = 105MHz
FIGURE 26. TYPICAL SFDR PERFORMANCE vs TEMPERATURE,
DEVICE CALIBRATED AT +25°C, fIN = 105MHz
73.50
73.75
74.00
74.25
74.50
74.75
75.00
-40
-35
-30
-25
-20
TEMPERATURE (°C)
-2dBFS ANALOG INPUT
-1dBFS ANALOG INPUT
75
80
85
-40
-35
-30
-25
-20
-2dBFS ANALOG INPUT
-1dBFS ANALOG INPUT
TEMPERATURE (°C)
73.50
73.75
74.00
74.25
74.50
74.75
75.00
5
1015
2025
3035
40
45
TEMPERATURE (°C)
-2dBFS ANALOG INPUT
-1dBFS ANALOG INPUT
75
80
85
5
10
152025
30
3540
45
-2dBFS ANALOG INPUT
-1dBFS ANALOG INPUT
TEMPERATURE (°C)



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