Smart shut down function

L6391

14/21

Doc ID 17892 Rev 1

In common over-current protection architectures the comparator output is usually connected

to the SD input and an RC network is connected to this SD/OD line in order to provide a

mono-stable circuit, which implements a protection time that follows the fault condition.

Differently from the common fault detection systems, L6391 Smart shut down architecture

allows to immediately turn-off the outputs gate driver in case of fault, by minimizing the

propagation delay between the fault detection event and the actual outputs switch-off. In fact

the time delay between the fault and the outputs turn off is no more dependent on the RC

value of the external network connected to the pin. In the smart shut down circuitry, the fault

signal has a preferential path which directly switches off the outputs after the comparator

triggering. At the same time the internal logic turns on the open drain output and holds it on

until the SD voltage goes below the SD logic input lower threshold. The Smart shut down

system provides the possibility to increase the time constant of the external RC network

(that is the disable time after the fault event) up to very large values without increasing the

delay time of the protection. Any external signal provided to the SD pin is not latched and

can be used as control signal in order to perform, for instance, PWM chopping through this

pin. In fact when a PWM signal is applied to the SD input and the logic inputs of the gate

driver are stable, the outputs switch from the low level to the state defined by the logic inputs

and vice versa.