ST10F272B_12 datasheet(102/188 Pages) STMICROELECTRONICS

102 / 188 page

System reset

ST10F272B/ST10F272E

102/188

Doc ID 11917 Rev 3

Figure 28.

SW / WDT bidirectional RESET (EA=0) followed by a HW RESET

20.7

Reset circuitry

Internal reset circuitry is described in Figure 31. The RSTIN pin provides an internal pull-up

resistor of 50k

Ω to 250kΩ (The minimum reset time must be calculated using the lowest

value).

It also provides a programmable (BDRSTEN bit of SYSCON register) pull-down to output

internal reset state signal (synchronous reset, watchdog timer reset or software reset).

This bidirectional reset function is useful in applications where external devices require a

reset signal but cannot be connected to RSTOUT pin.

This is the case of an external memory running codes before EINIT (end of initialization)

instruction is executed. RSTOUT pin is pulled high only when EINIT is executed.

The RPD pin provides an internal weak pull-down resistor which discharges external

capacitor at a typical rate of 200

μA. If bit PWDCFG of SYSCON register is set, an internal

pull-up resistor is activated at the end of the reset sequence. This pull-up will charge any

capacitor connected on RPD pin.

The simplest way to reset the ST10F272 is to insert a capacitor C1 between RSTIN pin and

VSS, and a capacitor between RPD pin and VSS (C0) with a pull-up resistor R0 between

RPD pin and VDD. The input RSTIN provides an internal pull-up device equalling a resistor of

50k

Ω to 250kΩ (the minimum reset time must be determined by the lowest value). Select C1

that produce a sufficient discharge time to permit the internal or external oscillator and / or

internal PLL and the on-chip voltage regulator to stabilize.

ST10F272B Datasheet(PDF) 102 Page - STMicroelectronics