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ST10F280 Datasheet(PDF) 108 Page - STMicroelectronics |
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ST10F280 Datasheet(HTML) 108 Page - STMicroelectronics |
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108 / 239 page ![]() Parallel ports ST10F280 108/239 Doc ID 8673 Rev. 3 The port output latch is clocked by the signal “Compare Trigger” which is generated by the CAPCOM unit. In compare mode 3, when a match occurs, the value '1' is written to the port output latch via the line “Alternate Data Output”. When an overflow of the corresponding timer occurs, a '0' is written to the port output latch. In both cases, the output latch is clocked by the signal “Compare Trigger”. The direction of the pin should be set to output by the user, otherwise the pin will be in the high-impedance state and will not reflect the state of the output latch. As can be seen from the port structure below, the user software always has free access to the port pin even when it is used as a compare output. This is useful for setting up the initial level of the pin when using compare mode 1 or the double-register mode. In these modes, unlike in compare mode 3, the pin is not set to a specific value when a compare match occurs, but is toggled instead. When the user wants to write to the port pin at the same time a compare trigger tries to clock the output latch, the write operation of the user software has priority. Each time a CPU write access to the port output latch occurs, the input multiplexer of the port output latch is switched to the line connected to the internal bus. The port output latch will receive the value from the internal bus and the hardware triggered change will be lost. As all other capture inputs, the capture input function of pins P2.15...P2.0 can also be used as external interrupt inputs (200 ns sample rate at 40MHz CPU clock). The upper eight Port 2 lines (P2.15...P2.8) also can serve as Fast External Interrupt inputs from EX0IN to EX7IN. (Fast external interrupt sampling rate is 25ns at 40MHz CPU clock). P2.15 in addition serves as input for CAPCOM2 timer T7 (T7IN). The table below summarizes the alternate functions of Port 2. Table 18. Port 2 alternate function Port 2 pin Alternate function a) Alternate function b) Alternate function c) P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P2.8 P2.9 P2.10 P2.11 P2.12 P2.13 P2.14 P2.15 CC0IO CC1IO CC2IO CC3IO CC4IO CC5IO CC6IO CC7IO CC8IO CC9IO CC10IO CC11IO CC12IO CC13IO CC14IO CC15IO - - - - - - - - EX0IN Fast External Interrupt 0 Input EX1IN Fast External Interrupt 1 Input EX2IN Fast External Interrupt 2 Input EX3IN Fast External Interrupt 3 Input EX4IN Fast External Interrupt 4 Input EX5IN Fast External Interrupt 5 Input EX6IN Fast External Interrupt 6 Input EX7IN Fast External Interrupt 7 Input - - - - - - - - - - - - - - - T7IN Timer T7 Ext. Count Input |
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