ST10F280_12 datasheet(125/239 Pages) STMICROELECTRONICS

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ST10F280

Parallel ports

Doc ID 8673 Rev. 3

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12.8.1

Alternate functions of Port 6

A programmable number of chip select signals (CS4...CS0) derived from the bus control

registers (BUSCON4...BUSCON0) can be output on the 5 pins of Port 6. The number of chip

select signals is selected via PORT0 during reset. The selected value can be read from

bitfield CSSEL in register RP0H (read only) e.g. in order to check the configuration during

run time. The table below summarizes the alternate functions of Port 6 depending on the

number of selected chip select lines (coded via bitfield CSSEL).

Figure 44.

Port 6 I/O and alternate functions

The chip select lines of Port 6 have an internal weak pull-up device. This device is switched

on during reset. This feature is implemented to drive the chip select lines high during reset

in order to avoid multiple chip selection.

After reset the CS function must be used, if selected so. In this case there is no possibility to

program any port latches before. Thus the alternate function (CS) is selected automatically

in this case.

Note:

The open drain output option can only be selected via software earliest during the

initialization routine; at least signal CS0 will be in push/pull output driver mode directly after

reset.

Table 22.

Port 6 alternate functions

Port 6 Pin

Altern. Function

CSSEL = 10

Altern. Function

CSSEL = 01

Altern. Function

CSSEL = 00

Altern. Function

CSSEL = 11

P6.0

P6.1

P6.2

P6.3

P6.4

General purpose I/O

Chip select CS0

Chip select CS1

Gen. purpose I/O

Chip select CS0

Chip select CS1

Chip select CS2

Gen. purpose I/O

Chip select CS0

Chip select CS1

Chip select CS2

Chip select CS3

Chip select CS4

P6.5

P6.6

P6.7

HOLD External hold request input

HLDA Hold acknowledge output

BREQ Bus request output

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