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ST10F280 Datasheet(PDF) 192 Page - STMicroelectronics |
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ST10F280 Datasheet(HTML) 192 Page - STMicroelectronics |
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192 / 239 page  Special function register overview ST10F280 192/239 Doc ID 8673 Rev. 3 T6CON b FF48h A4h GPT2 Timer 6 Control Register 0000h T6IC b FF68h B4h GPT2 Timer 6 Interrupt Control Register - - 00h T7 F050h E 28h CAPCOM Timer 7 Register 0000h T78CON b FF20h 90h CAPCOM Timer 7 and 8 Control Register 0000h T7IC b F17Ah E BEh CAPCOM Timer 7 Interrupt Control Register - - 00h T7REL F054h E 2Ah CAPCOM Timer 7 Reload Register 0000h T8 F052h E 29h CAPCOM Timer 8 Register 0000h T8IC b F17Ch E BFh CAPCOM Timer 8 Interrupt Control Register - - 00h T8REL F056h E 2Bh CAPCOM Timer 8 Reload Register 0000h TFR b FFACh D6h Trap Flag Register 0000h WDT FEAEh 57h Watchdog Timer Register (read only) 0000h WDTCON b FFAEh D7h Watchdog Timer Control Register 00xxh(2) XP0IC b F186h E C3h CAN1 Module Interrupt Control Register - - 00h(3) XP1IC b F18Eh E C7h CAN2 Module Interrupt Control Register - - 00h(3) XP2IC b F196h E CBh XPWM Interrupt Control Register - - 00h(3) XP3IC b F19Eh E CFh PLL unlock Interrupt Control Register - - 00h(3) XPERCON F024h E 12h XPER Configuration Register - - 05h ZEROS b FF1Ch 8Eh Constant Value 0’s Register (read only) 0000h 1. The system configuration is selected during reset. 2. Bit WDTR indicates a watchdog timer triggered reset. 3. The XPnIC Interrupt Control Registers control interrupt requests from integrated X-Bus peripherals. Some software controlled interrupt requests may be generated by setting the XPnIR bits (of XPnIC register) of the unused X-peripheral nodes. Table 39. X registers listed by name Name Physical address Description Reset value CAN1BTR EF04h CAN1 Bit Timing Register XXXXh CAN1CSR EF00h CAN1 Control/Status Register XX01h CAN1GMS EF06h CAN1 Global Mask Short XFXXh CAN1IR EF02h CAN1 Interrupt Register - - XXh CAN1LAR1--15 EF14--EFF4h CAN1 Lower Arbitration register 1 to 15 XXXXh CAN1LGML EF0Ah CAN1 Lower Global Mask Long XXXXh CAN1LMLM EF0Eh CAN1 Lower Mask Last Message XXXXh CAN1MCR1--15 EF10--EFF0h CAN1 Message Control Register 1 to 15 XXXXh CAN1MO1--15 EF1x--EFFxh CAN1 Message Object 1 to 15 XXXXh Table 38. Special function registers listed by name (continued) Name Physical address 8-bit address Description Reset value |
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