L99PM62XP datasheet(72/98 Pages) STMICROELECTRONICS

72 / 98 page

ST SPI

L99PM62XP

72/98

Doc ID 16363 Rev 3

6.1.9

Format of data shifted out at SDO during read cycle

Failures are indicated by activating the corresponding bit of the <Global Status> register.

The returned data byte(s) represent(s) the content of the register to be read.

Figure 37.

Format of data shifted out at SDO during read cycle

6.1.10

Read and clear status operation

The ‘Read and Clear Status’ operation starts with a command byte followed by 2 data bytes.

The number of data bytes is specified in the

<SPI-frame-ID>. The content of the data bytes

Table 55.

Format of data shifted out at SDO during read cycle: global status

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Global error

flag (GEF)

Comm

error

Not (chip reset

or comm error)

TSD2

TSD1

V1 Fail

VS Fail

(OV/UV)

Fail

safe

Table 56.

Format of data shifted out at SDO during read cycle: data byte 1

MSB

Previous content of addressed register

LSB

D15

D14

D13

D12

D11

D10

Table 57.

Format of data shifted out at SDO during read cycle: data byte 2

MSB

Previous content of addressed register

LSB

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