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STI7100 Datasheet(PDF) 1 Page - STMicroelectronics |
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STI7100 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 9 page ![]() Data Brief For further information contact your local STMicroelectronics sales office. December 2006 Rev 2 1/9 9 STi7100 Low cost HDTV set-top box decoder for H.264/AVC and MPEG-2 Features ■ The STi7100 is a single-chip, high-definition STB decoder including: – ST40 CPU core, 266 MHz – dual ST231 CPU cores for audio and video decoding, both 400 MHz – transport filtering and descrambling – video decoder: H.264/AVC and MPEG-2 – graphics engine and dual display: high-definition (HD) and standard definition (SD) – audio decoder ■ The STi7100 also features the following embedded interfaces: –USB 2.0 – DVI/HDMI output – digital audio and video auxiliary input – modem – serial ATA 32 CP ST40 core 266 MHz UDI 16 K Icache MMU Int. control 32 K Dcache LMI Digital video input LMU S/PDIF 2-ch PCM in SD video in TMDS main video DENC EMI 3x SSCs 4x UARTs ILC 2x I/F SmCard 6x GPIO PWM MAFE interface IR Tx/Rx STBus Main video display FDMA AudioL TSmerger/router Display compositor 2D gamma blitter DACs DVI-HDCP HDMI Output stage Main video output (HD) YPbPr Aux video output (SD) YC/CVBS USB AudioR PDES Clock generator 5 x 2-ch PCM out Peripheral I/O and external interrupts Flash peripherals TSIN0 NRSS-A TSIN1 TS I/O and system services DACs CUR Aux video display Audio decoder and interfaces Audio DACs PTI output (HD) Video decoder H.264/AVC, MPEG2 2.0 Serial ATA interface LMI 32 SDRAM DDR Video System ST231 core ST231 core DiSEqC DAA GDP GDP www.st.com |
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