CY8C54LP datasheet(7/117 Pages) CYPRESS

7 / 117 page

PRELIMINARY

PSoC® 5LP: CY8C54LP Family

Datasheet

Document Number: 001-84934 Rev. **

Page 7 of 117

Figure 2-4. 100-Pin TQFP Part Pinout

TQFP

(TRACEDATA[1] , GPIO)P2[5]

(TRACEDATA[2] , GPIO)P2[6]

(TRACEDATA[3] , GPIO)P2[7]

(I2C0 : SCL, SIO )P12[4]

(I2C0 : SDA, SIO )P12[5]

(GPIO)P6[4]

(GPIO)P6[5]

(GPIO)P6[6]

(GPIO)P6[7]

VSSB

IND

VBOOST

VBAT

VSSD

XRES

(GPIO)P5[0]

(GPIO)P5[1]

(GPIO)P5[2]

(GPIO)P5[3]

( TMS, SWDIO, GPIO)P1[0]

(TCK, SWDCK, GPIO)P1[1]

(Configurable XRES , GPIO)P1[2]

(TDO, SWV, GPIO)P1[3]

( TDI , GPIO)P1[4]

( NTRST, GPIO)P1[5]

VDDIO0

P0[3] ( GPIO,OPAMP0-/EXTREF0)

P0[2] ( GPIO,OPAMP0 +/SAR1 EXTREF)

P0[1] ( GPIO,OPAMP0OUT )

P0[0] ( GPIO,OPAMP2OUT )

P4[1] ( GPIO)

P4[0] ( GPIO)

P12[3] ( SIO)

P12[2] ( SIO)

VSSD

VDDA

VSSA

VCCA

P15[3] ( GPIO, KHZ XTAL:XI)

P15[2] ( GPIO, KHZ XTAL:XO)

P12[1] ( SIO ,I2C1 : SDA)

P12[0] ( SIO ,I2C1 : SCL)

P3[7] ( GPIO)

P3[6] ( GPIO)

Lines show VDDIO to

I/O supply association

Note

6. Pins are Do Not Use (DNU) on devices without USB. The pin must be left floating.

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