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STM32F303VCT6 Datasheet(PDF) 95 Page - STMicroelectronics |
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STM32F303VCT6 Datasheet(HTML) 95 Page - STMicroelectronics |
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95 / 132 page  DocID023353 Rev 6 95/132 STM32F302xx/STM32F303xx Electrical characteristics 117 6.3.17 Communications interfaces I2C interface characteristics The I2C interface meets the requirements of the standard I2C communication protocol with the following restrictions: the I/O pins SDA and SCL are mapped to are not “true” open- drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is disabled, but is still present. The I2C characteristics are described in Table 59. Refer also to Section 6.3.14: I/O port characteristics for more details on the input/output alternate function characteristics (SDA and SCL). Table 59. I2C timings specification (see I2C specification, rev.03, June 2007)(1) Symbol Parameter Standard mode Fast mode Fast Mode Plus Unit Min Max Min Max Min Max fSCL SCL clock frequency 0 100 0 400 0 1000 KHz tLOW Low period of the SCL clock 4.7 - 1.3 - 0.5 - µs tHIGH High Period of the SCL clock 4 0.6 0.26 - µs tr Rise time of both SDA and SCL signals - 1000 - 300 - 120 ns tf Fall time of both SDA and SCL signals - 300 - 300 - 120 ns tHD;DAT Data hold time 0 - 0 - 0 - µs tVD;DAT Data valid time - 3.45(2) -0.9(2) -0.45(2) µs tVD;ACK Data valid acknowledge time - 3.45(2) -0.9(2) -0.45(2) µs tSU;DAT Data setup time 250 - 100 - 50 - ns tHD:STA Hold time (repeated) START condition 4.0 - 0.6 - 0.26 - µs tSU:STA Set-up time for a repeated START condition 4.7 - 0.6 - 0.26 µs tSU:STO Set-up time for STOP condition 4.0 - 0.6 - 0.26 - µs tBUF Bus free time between a STOP and START condition 4.7 - 1.3 - 0.5 - µs Cb Capacitive load for each bus line - 400 - 400 - 550 pF 1. The I2C characteristics are the requirements from I2C bus specification rev03. They are guaranteed by design when I2Cx_TIMING register is correctly programmed (Refer to the reference manual). These characteristics are not tested in production. 2. The maximum tHD;DAT could be 3.45 µs, 0.9 µs and 0.45 µs for standard mode, fast mode and fast mode plus, but must be less than the maximum of tVD;DAT or tVD;ACK by a transition time. |
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