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STM32F303VCT6 Datasheet(PDF) 104 Page - STMicroelectronics

Part # STM32F303VCT6
Description  ARM Cortex-M4 32b MCUFPU, up to 256KB Flash48KB SRAM 4 ADCs, 2 DAC ch., 7 comp, 4 PGA, timers, 2.0-3.6 V operation
PDF  132 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F303VCT6 Datasheet(HTML) 104 Page - STMicroelectronics

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Electrical characteristics
STM32F302xx/STM32F303xx
104/132
DocID023353 Rev 6
CADC(1)
Internal sample and hold
capacitor
-5
-
pF
tCAL(1)
Calibration time
fADC = 72 MHz
1.56
µs
112
1/fADC
tlatr(1)
Trigger conversion latency
Regular and injected
channels without conversion
abort
CKMODE = 00
1.5
2
2.5
1/fADC
CKMODE = 01
-
-
2
1/fADC
CKMODE = 10
-
-
2.25
1/fADC
CKMODE = 11
-
-
2.125
1/fADC
tlatrinj(1)
Trigger conversion latency
Injected channels aborting a
regular conversion
CKMODE = 00
2.5
3
3.5
1/fADC
CKMODE = 01
-
-
3
1/fADC
CKMODE = 10
-
-
3.25
1/fADC
CKMODE = 11
-
-
3.125
1/fADC
tS(1)
Sampling time
fADC = 72 MHz
0.021
-
8.35
µs
1.5
-
601.5
1/fADC
TADCVREG
_STUP
(1)
ADC Voltage Regulator
Start-up time
--
10
µs
tCONV(1)
Total conversion time
(including sampling time)
fADC = 72 MHz
Resolution = 12 bits
0.19
-
8.52
µs
Resolution = 12 bits
14 to 614 (tS for sampling + 12.5 for
successive approximation)
1/fADC
1. Data guaranteed by design.
2. VREF+ can be internally connected to VDDA and VREF- can be internally connected to VSSA, depending on the package.
Refer to Section 4: Pinouts and pin description for further details.
Table 66. ADC characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Table 67. Maximum ADC RAIN (1)
Resolution
Sampling
cycle @
72 MHz
Sampling
time [ns] @
72 MHz
RAIN max (kΩ)
Fast channels(2)
Slow
channels
Other
channels(3)
12 bits
1.5
20.83
0.018
NA
NA
2.5
34.72
0.150
NA
0.022
4.5
62.50
0.470
0.220
0.180
7.5
104.17
0.820
0.560
0.470
19.5
270.83
2.70
1.80
1.50
61.5
854.17
8.20
6.80
4.70
181.5
2520.83
22.0
18.0
15.0
601.5
8354.17
82.0
68.0
47.0



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