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SPC5604BF2MLL6 Datasheet(PDF) 100 Page - Freescale Semiconductor, Inc |
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SPC5604BF2MLL6 Datasheet(HTML) 100 Page - Freescale Semiconductor, Inc |
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100 / 109 page ![]() MPC5604B/C Microcontroller Data Sheet, Rev. 11 Document revision history Freescale Semiconductor 100 2 06-Mar-2009 Made minor editing and formatting changes to improve readability Harmonized oscillator naming throughout document Features: —Replaced 32 KB with 48 KB as max SRAM size —Updated description of INTC —Changed max number of GPIO pins from 121 to 123 Updated Section 1.2, Description Updated Table 2 Added Section 2, Block diagram Section 3, Package pinouts and signal descriptions: Removed signal descriptions (these are found in the device reference manual) Updated Figure 5: —Replaced VPP with VSS_HV on pin 18 —Added MA[1] as AF3 for PC[10] (pin 28) —Added MA[0] as AF2 for PC[3] (pin 116) —Changed description for pin 120 to PH[10] / GPIO[122] / TMS —Changed description for pin 127 to PH[9] / GPIO[121] / TCK —Replaced NMI[0] with NMI on pin 11 Updated Figure 4: —Replaced VPP with VSS_HV on pin 14 —Added MA[1] as AF3 for PC[10] (pin 22) —Added MA[0] as AF2 for PC[3] (pin 77) —Changed description for pin 81 to PH[10] / GPIO[122] / TMS —Changed description for pin 88 to PH[9] / GPIO[121] / TCK —Removed E1UC[19] from pin 76 —Replaced [11] with WKUP[11] for PB[3] (pin 1) —Replaced NMI[0] with NMI on pin 7 Updated Figure 6: —Changed description for ball B8 from TCK to PH[9] —Changed description for ball B9 from TMS to PH[10] —Updated descriptions for balls R9 and T9 Added Section 3.10, Parameter classification and tagged parameters in tables where appropriate Added Section 3.11, NVUSRO register Updated Table 12 Section 3.13, Recommended operating conditions: Added note on RAM data retention to end of section Updated Table 13 and Table 14 Added Section 3.14.1, Package thermal characteristics Updated Section 3.14.2, Power considerations Updated Figure 7 Table 50. Revision history (continued) Revision Date Description of Changes |
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