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Z8F0113 Datasheet(PDF) 51 Page - Zilog, Inc. |
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Z8F0113 Datasheet(HTML) 51 Page - Zilog, Inc. |
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51 / 245 page ![]() PS024315-1011 P R E L I M I N A R Y GPIO Alternate Functions Z8 Encore! XP® F0823 Series Product Specification 36 Table 17. Port Alternate Function Mapping (Non 8-Pin Parts) Port Pin Mnemonic Alternate Function Description Alternate Function Set Register AFS1 Port A1 PA0 T0IN/T0OUT Timer 0 Input/Timer 0 Output Complement N/A Reserved PA1 T0OUT Timer 0 Output Reserved PA2 DE0 UART 0 Driver Enable Reserved PA3 CTS0 UART 0 Clear to Send Reserved PA4 RXD0/IRRX0 UART 0 / IrDA 0 Receive Data Reserved PA5 TXD0/IRTX0 UART 0 / IrDA 0 Transmit Data Reserved PA6 T1IN/T1OUT2 Timer 1 Input/Timer 1 Output Complement Reserved PA7 T1OUT Timer 1 Output Reserved Notes: 1. Because there is only a single alternate function for each Port A pin, the Alternate Function Set registers are not implemented for Port A. Enabling alternate function selections as described in the Port A–C Alternate Function Subregisters section on page 43 automatically enables the associated alternate function. 2. Whether PA0/PA6 take on the timer input or timer output complement function depends on the timer configura- tion as described in the Timer Pin Signal Operation section on page 83. 3. Because there are at most two choices of alternate function for any pin of Port B, the Alternate Function Set reg- ister AFS2 is implemented but not used to select the function. Also, alternate function selection as described in the Port A–C Alternate Function Subregisters section on page 43 must also be enabled. 4. VREF is available on PB5 in 28-pin products only. 5. Because there are at most two choices of alternate function for any pin of Port C, the Alternate Function Set reg- ister AFS2 is implemented but not used to select the function. Also, Alternate Function selection as described in the Port A–C Alternate Function Subregisters section on page 43 must also be enabled. 6. VREF is available on PC2 in 20-pin parts only. |
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