M68ICS08GR datasheet(326/408 Pages) FREESCALE

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Serial Peripheral Interface (SPI)

Technical Data

MC68HC908GR8 — Rev 4.0

326

Serial Peripheral Interface (SPI)

MOTOROLA

MODF — Mode Fault Bit

This clearable, read-only flag is set in a slave SPI if the SS pin goes

high during a transmission with the MODFEN bit set. In a master SPI,

the MODF flag is set if the SS pin goes low at any time with the

MODFEN bit set. Clear the MODF bit by reading the SPI status and

control register (SPSCR) with MODF set and then writing to the SPI

control register (SPCR). Reset clears the MODF bit.

1 = SS pin at inappropriate logic level

0 = SS pin at appropriate logic level

SPTE — SPI Transmitter Empty Bit

This clearable, read-only flag is set each time the transmit data

SPTE CPU interrupt request or an SPTE DMA service request if the

SPTIE bit in the SPI control register is set also.

NOTE:

Do not write to the SPI data register unless the SPTE bit is high.

During an SPTE CPU interrupt, the CPU clears the SPTE bit by

writing to the transmit data register.

Reset sets the SPTE bit.

1 = Transmit data register empty

0 = Transmit data register not empty

MODFEN — Mode Fault Enable Bit

This read/write bit, when set to 1, allows the MODF flag to be set. If

the MODF flag is set, clearing the MODFEN does not clear the MODF

flag. If the SPI is enabled as a master and the MODFEN bit is low,

then the SS pin is available as a general-purpose I/O.

If the MODFEN bit is set, then this pin is not available as a general-

purpose I/O. When the SPI is enabled as a slave, the SS pin is not

available as a general-purpose I/O regardless of the value of

MODFEN. See SS (Slave Select).

If the MODFEN bit is low, the level of the SS pin does not affect the

operation of an enabled SPI configured as a master. For an enabled

SPI configured as a slave, having MODFEN low only prevents the

MODF flag from being set. It does not affect any other part of SPI

operation. See Mode Fault Error.

Freescale Semiconductor, Inc.

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