M68ICS08GR datasheet(340/408 Pages) FREESCALE

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Timer Interface Module (TIM)

Technical Data

MC68HC908GR8 — Rev 4.0

340

Timer Interface Module (TIM)

MOTOROLA

22.5.1 TIM Counter Prescaler

The TIM clock source can be one of the seven prescaler outputs or the

TIM clock pin, TCLK. The prescaler generates seven clock rates from

the internal bus clock. The prescaler select bits, PS[2:0], in the TIM

status and control register select the TIM clock source.

$002D

Timer 2 Counter Register

Low (T2CNTL)

Read:

Bit 7

654321

Bit 0

Write:

Reset:

00000000

$002E

Timer 2 Counter Modulo

Read:

Bit 15

Bit 8

Write:

Reset:

11111111

$002F

Timer 2 Counter Modulo

Read:

Bit 7

654321

Bit 0

Write:

Reset:

11111111

$0030

Timer 2 Channel 0 Status

and Control Register

(T2SC0)

Read:

CH0F

CH0IE

MS0B

MS0A

ELS0B

ELS0A

TOV0

CH0MAX

Write:

Reset:

00000000

$0031

Timer 2 Channel 0

Read:

Bit 15

Bit 8

Write:

Reset:

Indeterminate after reset

$0032

Timer 2 Channel 0

Read:

Bit 7

654321

Bit 0

Write:

Reset:

Indeterminate after reset

$0033

Unimplemented

Read:

Write:

Reset:

00000000

$0034

Unimplemented

Read:

Write:

Reset:

Indeterminate after reset

$0035

Unimplemented

Read:

Write:

Reset:

Indeterminate after reset

Addr.

Bit 7

654321

Bit 0

= Unimplemented

Figure 22-2. TIM I/O Register Summary (Sheet 2 of 2)

Freescale Semiconductor, Inc.

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