 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DS91D176TMA/NOPB Datasheet(PDF) 5 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
DS91D176TMA/NOPB Datasheet(HTML) 5 Page - Texas Instruments |
|
|
5 / 19 page  DS91C176, DS91D176 www.ti.com SNLS146L – MARCH 2006 – REVISED APRIL 2013 Electrical Characteristics (continued) Over recommended operating supply and temperature ranges unless otherwise specified. (1) (2) (3) (4) Parameter Test Conditions Min Typ Max Units SUPPLY CURRENT (VCC) ICCD Driver Supply Current RL = 50Ω, DE = VCC, RE = VCC 20 29.5 mA ICCZ TRI-STATE Supply Current DE = GND, RE = VCC 6 9.0 mA ICCR Receiver Supply Current DE = GND, RE = GND 14 18.5 mA Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (1) (2) Parameter Test Conditions Min Typ Max Units DRIVER AC SPECIFICATION tPLH Differential Propagation Delay Low to High RL = 50Ω, CL = 5 pF, 1.3 3.4 5.0 ns CD = 0.5 pF tPHL Differential Propagation Delay High to Low 1.3 3.1 5.0 ns Figure 9 and Figure 10 tSKD1 (tsk(p)) Pulse Skew |tPLHD − tPHLD| (3) (4) 300 420 ps tSKD3 Part-to-Part Skew (5) (5) 1.3 ns tTLH (tr) Rise Time (4) 1.0 1.8 3.0 ns tTHL (tf) Fall Time (4) 1.0 1.8 3.0 ns tPZH Enable Time (Z to Active High) RL = 50Ω, CL = 5 pF, 8 ns CD = 0.5 pF tPZL Enable Time (Z to Active Low ) 8 ns See Figure 11 and Figure 12 tPLZ Disable Time (Active Low to Z) 8 ns tPHZ Disable Time (Active High to Z) 8 ns tJIT Random Jitter, RJ (4) 100 MHz Clock Pattern (6) 2.5 5.5 psrms fMAX Maximum Data Rate 200 Mbps RECEIVER AC SPECIFICATION tPLH Propagation Delay Low to High CL = 15 pF 2.0 4.7 7.5 ns See Figure 13, Figure 14 and Figure 15 tPHL Propagation Delay High to Low 2.0 5.3 7.5 ns tSKD1 (tsk(p)) Pulse Skew |tPLHD − tPHLD| (3) (4) 0.6 1.7 ns tSKD3 Part-to-Part Skew (5) (4) 1.3 ns tTLH (tr) Rise Time (4) 0.5 1.2 2.5 ns tTHL (tf) Fall Time (4) 0.5 1.2 2.5 ns tPZH Enable Time (Z to Active High) RL = 500Ω, CL = 15 pF 10 ns See Figure 16 and Figure 17 tPZL Enable Time (Z to Active Low) 10 ns tPLZ Disable Time (Active Low to Z) 10 ns tPHZ Disable Time (Active High to Z) 10 ns fMAX Maximum Data Rate 200 Mbps (1) All typicals are given for VCC = 3.3V and TA = 25°C. (2) CL includes fixture capacitance and CD includes probe capacitance. (3) tSKD1, |tPLHD − tPHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. (4) Not production tested. Specified by a statistical analysis on a sample basis at the time of characterization. (5) tSKD3, Part-to-Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range. (6) Stimulus and fixture Jitter has been subtracted. Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: DS91C176 DS91D176 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
