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DSPIC33FJ12MC201TESS Datasheet(PDF) 249 Page - Microchip Technology |
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DSPIC33FJ12MC201TESS Datasheet(HTML) 249 Page - Microchip Technology |
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249 / 304 page ![]() © 2007-2011 Microchip Technology Inc. DS70265E-page 249 dsPIC33FJ12MC201/202 TABLE 24-33: SPIx MASTER MODE (HALF-DUPLEX, TRANSMIT ONLY) TIMING REQUIREMENTS AC CHARACTERISTICS S t a n d a r d O p e r a t in g C o n d it io n s : 3 .0 V t o 3 .6 V ( u n le s s o t h e r w is e s t a t e d ) Operating temperature -40°C ≤TA ≤+85°C for Industrial -40°C ≤TA ≤+125°C for Extended Param No. Symbol Characteristic(1) Min Typ(2) Max Units Conditions SP10 TscP Maximum SCK Frequency — — 15 MHz See Note 3 SP20 TscF SCKx Output Fall Time — — — ns See parameter DO32 and Note 4 SP21 TscR SCKx Output Rise Time — — — ns See parameter DO31 and Note 4 SP30 TdoF SDOx Data Output Fall Time — — — ns See parameter DO32 and Note 4 SP31 TdoR SDOx Data Output Rise Time — — — ns See parameter DO31 and Note 4 SP35 TscH2doV, TscL2doV SDOx Data Output Valid after SCKx Edge —6 20 ns — SP36 TdiV2scH, TdiV2scL SDOx Data Output Setup to First SCKx Edge 30 — — ns — Note 1: These parameters are characterized, but are not tested in manufacturing. 2: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. 3: The minimum clock period for SCKx is 66.7 ns. Therefore, the clock generated in Master mode must not violate this specification. 4: Assumes 50 pF load on all SPIx pins. |
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