DSPIC33FJ12MC201TESS datasheet(67/304 Pages) MICROCHIP

67 / 304 page

DS70265E-page 67

dsPIC33FJ12MC201/202

FIGURE 6-2:

SYSTEM RESET TIMING

Reset

Run

Device Status

VDD

VPOR

Vbor

VBOR

POR

BOR

SYSRST

TPWRT

TPOR

TBOR

Oscillator Clock

TOSCD

TOST

TLOCK

Time

FSCM

TFSCM

POR:

A POR circuit holds the device in Reset when the power supply is turned on. The POR circuit is active until VDD crosses the

VPOR threshold and the delay TPOR has elapsed.

BOR:

The on-chip voltage regulator has a BOR circuit that keeps the device in Reset until VDD crosses the VBOR threshold and the

delay TBOR has elapsed. The delay TBOR ensures the voltage regulator output becomes stable.

PWRT Timer:

The programmable power-up timer continues to hold the processor in Reset for a specific period of time (TPWRT)

after a BOR. The delay TPWRT ensures that the system power supplies have stabilized at the appropriate level for full-speed oper-

ation. After the delay TPWRT has elapsed, the SYSRST becomes inactive, which in turn enables the selected oscillator to start gen-

erating clock cycles.

Oscillator Delay:

The total delay for the clock to be ready for various clock source selections are given in Table 6-1. Refer to

Section 8.0 “Oscillator Configuration”

for more information.

When the oscillator clock is ready, the processor begins execution from location 0x000000. The user application programs a GOTO

instruction at the Reset address, which redirects program execution to the appropriate start-up routine.

The Fail-safe clock monitor (FSCM), if enabled, begins to monitor the system clock when the system clock is ready and the delay

TFSCM elapsed.

TABLE 6-2:

OSCILLATOR PARAMETERS

Symbol

Parameter

Value

VPOR

POR threshold

1.8V nominal

TPOR

POR extension time 30

μs maximum

VBOR

BOR threshold

2.5V nominal

TBOR

BOR extension time 100

μs maximum

TPWRT

Programmable

power-up time delay

0-128 ms nominal

TFSCM

Fail-safe Clock

Monitor Delay

900

μs maximum

Note:

When the device exits the Reset condi-

tion (begins normal operation), the

device operating parameters (voltage,

frequency, temperature, etc.) must be

within their operating ranges, other-

wise the device may not function cor-

rectly.

The

user

application

must

ensure that the delay between the time

power is first applied, and the time

SYSRST becomes inactive, is long

enough to get all operating parameters

within specification.

DSPIC33FJ12MC201TESS Datasheet(PDF) 67 Page - Microchip Technology

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