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PIC16F1825T-ESS Datasheet(PDF) 246 Page - Microchip Technology |
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PIC16F1825T-ESS Datasheet(HTML) 246 Page - Microchip Technology |
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246 / 448 page ![]() PIC16(L)F1825/1829 DS41440C-page 246 2010-2012 Microchip Technology Inc. The MSSPx consists of a transmit/receive shift register (SSPxSR) and a buffer register (SSPxBUF). The SSPxSR shifts the data in and out of the device, MSb first. The SSPxBUF holds the data that was written to the SSPxSR until the received data is ready. Once the eight bits of data have been received, that byte is moved to the SSPxBUF register. Then, the Buffer Full Detect bit, BF of the SSPxSTAT register, and the interrupt flag bit, SSPxIF, are set. This double-buffering of the received data (SSPxBUF) allows the next byte to start reception before reading the data that was just received. Any write to the SSPxBUF register during transmission/reception of data will be ignored and the write collision detect bit WCOL of the SSPxCON1 register, will be set. User software must clear the WCOL bit to allow the following write(s) to the SSPxBUF register to complete successfully. When the application software is expecting to receive valid data, the SSPxBUF should be read before the next byte of data to transfer is written to the SSPxBUF. The Buffer Full bit, BF of the SSPxSTAT register, indicates when SSPxBUF has been loaded with the received data (transmission is complete). When the SSPxBUF is read, the BF bit is cleared. This data may be irrelevant if the SPI is only a transmitter. Generally, the MSSPx interrupt is used to determine when the transmission/reception has completed. If the interrupt method is not going to be used, then software polling can be done to ensure that a write collision does not occur. The SSPxSR is not directly readable or writable and can only be accessed by addressing the SSPxBUF register. Additionally, the SSPxSTAT register indicates the various Status conditions. FIGURE 25-5: SPI MASTER/SLAVE CONNECTION Serial Input Buffer (BUF) Shift Register (SSPxSR) MSb LSb SDOx SDIx Processor 1 SCKx SPI Master SSPM<3:0> = 00xx Serial Input Buffer (SSPxBUF) Shift Register (SSPxSR) LSb MSb SDIx SDOx Processor 2 SCKx SPI Slave SSPM<3:0> = 010x Serial Clock SSx Slave Select General I/O (optional) = 1010 |
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