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DSPIC33FJ32MC302EMM Datasheet(PDF) 106 Page - Microchip Technology |
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DSPIC33FJ32MC302EMM Datasheet(HTML) 106 Page - Microchip Technology |
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106 / 460 page ![]() dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04 DS70291G-page 106 © 2007-2012 Microchip Technology Inc. bit 2 OC1IE: Output Compare Channel 1 Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled bit 1 IC1IE: Input Capture Channel 1 Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled bit 0 INT0IE: External Interrupt 0 Flag Status bit 1 = Interrupt request enabled 0 = Interrupt request not enabled REGISTER 7-10: IEC0: INTERRUPT ENABLE CONTROL REGISTER 0 (CONTINUED) |
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