IMX53IEC datasheet(65/173 Pages) FREESCALE

65 / 173 page

Electrical Characteristics

i.MX53 Applications Processors for Industrial Products, Rev. 6

Freescale Semiconductor

4.7

External Peripheral Interfaces Parameters

The following subsections provide information on external peripheral interfaces.

4.7.1

AUDMUX Timing Parameters

The AUDMUX provides a programmable interconnect logic for voice, audio and data routing between

internal serial interfaces (SSIs) and external serial interfaces (audio and voice codecs). The AC timing of

AUDMUX external pins is governed by the SSI module. For more information, see the respective SSI

electrical specifications found within this document.

4.7.2

CSPI and ECSPI Timing Parameters

This section describes the timing parameters of the CSPI and ECSPI blocks. The CSPI and ECSPI have

separate timing parameters for master and slave modes. The nomenclature used with the CSPI / ECSPI

modules and the respective routing of these signals is shown in Table 44.

4.7.2.1

CSPI Master Mode Timing

Figure 32 depicts the timing of CSPI in master mode. Table 45 lists the CSPI master mode timing

characteristics.

Figure 32. CSPI/ECSPI Master Mode Timing Diagram

Table 44. CSPI Nomenclature and Routing

Block Instance

I/O Access

ECSPI-1

GPIO, KPP, DISP0_DAT, CSI0_DAT and EIM_D through IOMUXC

ECSPI-2

DISP0_DAT, CSI0_DAT and EIM through IOMUXC

CSPI

DISP0_DAT, EIM_A/D, SD1 and SD2 through IOMUXC

CS1

CS7

CS2

CS4

CS6

CS5

CS8

CS9

SCLK

SSx

MOSI

MISO

RDY

CS10

CS3

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